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2024-02-16Improve feature detect for combined aarch64 featuresAdam Gemmell-10/+12
LLVM's `ssbs` and `mte` target_features represent two Arm features. Linux's HWCAP also represents the same two features, so this is just a documentation update. LLVM's `ras` target_feature represents two Arm features - FEAT_RAS and FEAT_RASv1p1. There is no runtime detection for this, so this is a no-op in stdarch. LLVM's `aes` feature covers both `FEAT_AES` and `FEAT_PMULL`, but Linux exposes seperate feature bits. This patch makes the `aes` target_feature correctly shortcut runtime `pmull` detection and also makes the `aes` feature check for `pmull` at runtime to bring it in line with the target_feature behaviour. In practice I think this makes the two runtime features identical since the ID_AA64ISAR0_EL1 register does not allow for PMULL without AES.
2024-02-16Add vec_subcLuca Barbato-0/+34
2024-02-16Add vec_roundLuca Barbato-0/+40
2024-02-16Add vec_rlLuca Barbato-0/+77
2024-02-16Add vec_cntlzLuca Barbato-0/+55
2024-02-16Update test expectations for aarch64Nikita Popov-40/+33
2024-02-14Remove last mention of `stdsimd`daxpedda-8/+1
2024-02-11Add vec_st, vec_stl, vec_steLuca Barbato-0/+175
2024-02-11Fix vec_ldlLuca Barbato-3/+3
2024-01-29Add vec_cmpneLuca Barbato-0/+86
2024-01-29Add the boolean types for vec_norLuca Barbato-4/+1
2024-01-29Add vec_addeLuca Barbato-0/+43
2024-01-26CI: add a success conclusion jobJakub Beránek-0/+17
2024-01-26Add vec_slv and vec_srvLuca Barbato-0/+41
2024-01-26Add vec_sroLuca Barbato-2/+28
2024-01-26Add vec_srlLuca Barbato-2/+28
2024-01-26Add vec_sraLuca Barbato-0/+26
2024-01-26Add vec_srLuca Barbato-12/+35
2024-01-26Add vec_sloLuca Barbato-0/+45
2024-01-26Add vec_sllLuca Barbato-0/+37
2024-01-26Add vec_sld and vec_sldwLuca Barbato-0/+179
2024-01-26Add vec_slLuca Barbato-0/+77
2024-01-16Add CPU detection for macOS/aarch64.Makoto Kato-0/+133
2024-01-15Rename vec_splat_i* to the correct nameLuca Barbato-6/+6
2024-01-10Use latest version of actions/checkout actionTaiki Endo-6/+6
2024-01-10Add missing ARM-v7A CRC intrinsics (#1515)eupn-57/+74
* Move aarch64 crc into arm shared module * Add missing 32-bit arm crc intrinsics On 32-bit ARM, this intrinsic emits two instructions and splits its 64-bit input parameter between them. https://gcc.gnu.org/onlinedocs/gcc-4.9.4/gcc/ARM-ACLE-Intrinsics.html
2024-01-06Add vec_xstLuca Barbato-0/+77
2024-01-05Fix std_detect not being an unstable crateAmanieu d'Antras-6/+26
More fallout from #1486
2024-01-04Fix std build failure on non-x86 architecturesAmanieu d'Antras-1/+7
This is more fallout from #1486
2024-01-02Fixes for use in the standard libraryAmanieu d'Antras-6/+4
2023-12-19Update FreeBSD CI imageAlan Somers-1/+1
FreeBSD 12.4 will be EoL on 31-Dec-2023. Update CI to the oldest supported version, 13.2.
2023-12-19Add `#![allow(internal_features)]` to a test to fix CIAmanieu d'Antras-0/+1
2023-11-30Stabilize Ratified RISC-V Target FeaturesGijs Burghoorn-64/+51
As shortly discussed on Zulip (https://rust-lang.zulipchat.com/#narrow/stream/250483-t-compiler.2Frisc-v/topic/Stabilization.20of.20RISC-V.20Target.20Features/near/394793704), this commit stabilizes the ratified RISC-V instruction bases and extensions. Specifically, this commit stabilizes the: * Atomic Instructions (A) on v2.0 * Compressed Instructions (C) on v2.0 * Integer Multiplication and Division (M) on v2.0 * Bit Manipulations (B) on v1.0 listed as `zba`, `zbc`, `zbs` * Scalar Cryptography (Zk) v1.0.1 listed as `zk`, `zkn`, `zknd`, `zkne`, `zknh`, `zkr`, `zks`, `zksed`, `zksh`, `zkt`, `zbkb`, `zbkc` `zkbx`
2023-11-30Revert "Work around CI failures for the ARM target"Amanieu d'Antras-28/+22
This reverts commit 5a748ec5fabcaee29351ac3c90eee4f3e16964e7.
2023-11-30Report missing features when skipping tests.Jacob Bramley-11/+17
2023-11-30Work around CI failures for the ARM targetAmanieu d'Antras-22/+28
These seem to have been introduced by recent LLVM changes. * The instruction limit for vld*/vst* has been raised. This is not a significant issue, it is only used for testing. * vld*/vst* instructions are generated with overly strict alignments: https://github.com/rust-lang/stdarch/issues/1217 * vtbl/vtbx instrinsics are failing intrinsic-test for unknown reasons.
2023-11-18Re-implement some AVX functions without LLVM intrinsicsEduardo Sánchez Muñoz-12/+4
2023-11-18Use char constants for single-character patternsEduardo Sánchez Muñoz-31/+31
2023-11-18Silence `clippy::if_same_then_else` in a specific locationEduardo Sánchez Muñoz-0/+1
2023-11-18Use `str::strip_prefix` instead of `str::starts_with` + manual stripEduardo Sánchez Muñoz-38/+37
2023-11-18Use `is_empty` instead of comparing `len` to zeroEduardo Sánchez Muñoz-4/+4
2023-11-18Remove unneeded borrowsEduardo Sánchez Muñoz-44/+44
2023-11-17Improve intrinsic-test output formatting.Jacob Bramley-63/+132
This change is simple, but makes the generated tests much easier to follow (and debug).
2023-11-17Add --generate-only to intrinsic-test.Jacob Bramley-12/+34
This is useful for debugging.
2023-11-16do not use const stability attribute when we don't even need to call the ↵Ralf Jung-1/+0
intrinsic in const
2023-11-16Fix copy-paste typos for the _x2 and _x3 vector typesJake Goulding-12/+12
2023-11-05riscv: remove intrinsics that cannot be used from RustRalf Jung-89/+25
2023-11-01Don't pass target-features to host tests.Jacob Bramley-5/+14
This avoids a flood of warnings when testing the armv7-unknown-linux-gnueabihf target. Under this target, we would pass -Ctarget-features=+neon when building intrinsic-test, but it is compiled for the host (and this tool doesn't need Neon even if the host _is_ Armv7). This also sets --target when running the 'hex' example, since that seems more appropriate than always building it for the host.
2023-11-01Fix intrinsic-test author handling.Jacob Bramley-3/+6
CARGO_PKG_AUTHORS is :-separated. Also add myself to intrinsic-test authors.
2023-11-01Clean up intrinsic-test literals.Jacob Bramley-24/+33
- Ensure that C literals don't rely on undefined overflow behaviour. - We don't need to use 'as' casts, so remove them. - We weren't using allow(overflowing_literals), so remove it. - Format FP bit values as hex. This simplifies the test input initialisers in the generated files, making them shorter and easier to debug.