| Age | Commit message (Collapse) | Author | Lines | |
|---|---|---|---|---|
| 2025-05-31 | stdarch-test: Modernization of the coding style | Tsukasa OI | -1/+1 | |
| It modernizes the coding style of the crate stdarch-test by fixing Clippy warnings. Clippy: rust version 1.89.0-nightly (6f6971078 2025-05-28) Number of Fixed Warnings: 1/1 | ||||
| 2025-05-31 | stdarch-gen-loongarch: Modernization of the coding style | Tsukasa OI | -1/+1 | |
| It modernizes the coding style of the crate stdarch-gen-loongarch by fixing Clippy warnings. Clippy: rust version 1.89.0-nightly (6f6971078 2025-05-28) Number of Fixed Warnings: 1/1 Confirmed that the exact same code will be generated (note that, generated.rs in the repository is *not* an exact output but some spaces removed). | ||||
| 2025-05-31 | stdarch-gen-arm: Modernization of the coding style | Tsukasa OI | -170/+76 | |
| It modernizes the coding style of the crate stdarch-gen-arm by fixing Clippy warnings (except clippy::{collapsible_if,obfuscated_if_else} that might make the program look worse as a result of "fixing" warnings). Clippy: rust version 1.89.0-nightly (6f6971078 2025-05-28) Number of Fixed Warnings: 84/84 Note: Rust Analyzer double counts one of the Clippy warnings so it reduces 85 warnings (as reported by the Rust Analyzer). This commit also applies similar technique used to resolve Clippy warnings but also simplifies identifier name formatting and makes reading easier. Confirmed that the exact same code will be generated. | ||||
| 2025-05-30 | RISC-V: Linux: Imply Zicntr from the IMA base behavior | Tsukasa OI | -6/+4 | |
| As the author confirmed as in: <https://lists.infradead.org/pipermail/linux-riscv/2025-May/070844.html>, runtime detection of the Zicntr extension (as in the Linux kernel 6.15) is currently (and technically) redundant on the current base IMA behavior (although can be meaningful if new base behavior is added). This commit implies the Zicntr extension from the base IMA behavior. | ||||
| 2025-05-30 | Add back `std_detect_env_override` | sayantn | -2/+69 | |
| 2025-05-30 | Upgrade more intrinsics to the new version | sayantn | -24/+54 | |
| 2025-05-30 | Use the new definition of `rdtscp` intrinsic | sayantn | -4/+6 | |
| - add `-Zverify-llvm-ir` in testsuite | ||||
| 2025-05-30 | Fix s390x intrinsics | sayantn | -9/+9 | |
| - use correct intrinsic for unpackl - fix invalid use of `simd_{or,and,xor}` on floating point vectors - `vec_search_string` should require `vector-enhancements-2` | ||||
| 2025-05-30 | Fix PPC shift and rotate intrinsics | sayantn | -9/+9 | |
| 2025-05-30 | Fix `ldpte` and `lddir` signature | sayantn | -4/+6 | |
| - The 2nd argument of the LLVM intrinsic should be IMMARG | ||||
| 2025-05-30 | mark gfni, vaes, vpclmulqdq intrinsics as safe | usamoi | -132/+165 | |
| 2025-05-30 | cmpxchg16b: use atomic_compare_exchange from libcore | Ralf Jung | -28/+2 | |
| 2025-05-30 | Check cfg on features that stage0 compiler support | Tsukasa OI | -20/+0 | |
| Since the bootstrap compiler of Rust is bumped to the commit 5dadfd5c417f0b66816cb7ca662859e2c8751fb3 (version 1.88.0-beta.3 2025-05-11), some features should be safe to enable cfg checks. RISC-V Features: * "zicsr" * "zicntr" * "zihpm" * "zifencei" * "zihintntl" * "zihintpause" * "zimop" * "zicboz" * "zicond" * "ztso" * "zfa" * "zca" * "zcb" * "zcmop" * "b" x86 Features: * "amx-avx512" * "amx-fp8" * "amx-movrs" * "amx-tf32" * "amx-transpose" | ||||
| 2025-05-27 | fix: code cleanup and renaming | Madhav Madhusoodanan | -54/+57 | |
| 2025-05-27 | fix: moved common code (that required no architecture-specific | Madhav Madhusoodanan | -268/+243 | |
| modifications) outside the IntrinsicDefinition trait | ||||
| 2025-05-27 | fix: moved f16 formatting code to common module | Madhav Madhusoodanan | -10/+16 | |
| 2025-05-27 | Fix: removed BaseIntrinsicTypeDefinition + code cleanup | Madhav Madhusoodanan | -152/+49 | |
| 1. Removed default implementation of traits that are compulsorily implemented 2. Replaced BaseIntrinsicTypeDefinition with Deref<Target = IntrinsicType> | ||||
| 2025-05-27 | feat: merging changes related to f16 formatting | Madhav Madhusoodanan | -7/+105 | |
| 2025-05-27 | moved more code generation functionality to `common` | Madhav Madhusoodanan | -286/+301 | |
| 2025-05-27 | fix: aarch64_be issues wthin compilation | Madhav Madhusoodanan | -8/+11 | |
| 2025-05-27 | feat: made constraint common | Madhav Madhusoodanan | -113/+78 | |
| 2025-05-27 | chore: file renaming | Madhav Madhusoodanan | -25/+24 | |
| 2025-05-27 | code cleanup | Madhav Madhusoodanan | -23/+23 | |
| 2025-05-27 | Added dynamic dispatch for easier management of `<arch>ArchitectureTest` structs | Madhav Madhusoodanan | -13/+16 | |
| 2025-05-27 | moved the C compilation commands into a struct for easier handling | Madhav Madhusoodanan | -55/+193 | |
| 2025-05-27 | Removed aarch64-be specific execution command for rust test files | Madhav Madhusoodanan | -23/+8 | |
| 2025-05-27 | renamed `a64_only` data member in `Intrinsic` to `arch_tags` | Madhav Madhusoodanan | -4/+4 | |
| 2025-05-27 | Added a macro to simplify <Arch>IntrinsicType definitions | Madhav Madhusoodanan | -42/+59 | |
| 2025-05-27 | introduced generic types and code refactor | Madhav Madhusoodanan | -640/+808 | |
| 2025-05-27 | Updated `Argument::from_c` to remove `ArgPrep` specific argument | Madhav Madhusoodanan | -7/+31 | |
| 2025-05-27 | added target field within `IntrinsicType` to perform target level checking ↵ | Madhav Madhusoodanan | -12/+26 | |
| cleanly | ||||
| 2025-05-27 | test commit to check if `load_Values_c` can be dissociated from target logic | Madhav Madhusoodanan | -24/+32 | |
| 2025-05-27 | rename struct for naming consistency | Madhav Madhusoodanan | -4/+6 | |
| 2025-05-27 | maintaining special list of targets which need different execution command | Madhav Madhusoodanan | -5/+11 | |
| 2025-05-27 | fixed `too many files open` issue | Madhav Madhusoodanan | -24/+36 | |
| 2025-05-27 | chore: added match block in `src/main.rs` | Madhav Madhusoodanan | -2/+13 | |
| 2025-05-27 | chore: code consolidation | Madhav Madhusoodanan | -162/+145 | |
| 2025-05-27 | chore: separated common logic within file creations, compile_c, compile_rust ↵ | Madhav Madhusoodanan | -397/+501 | |
| and compare_outputs | ||||
| 2025-05-27 | chore: Added `ProcessedCli` to extract the logic to pre-process CLI struct args | Madhav Madhusoodanan | -608/+685 | |
| 2025-05-27 | Chore: Added `SupportedArchitectureTest` trait which must be implemented for ↵ | Madhav Madhusoodanan | -44/+60 | |
| different architectures. Next steps: Move the existing ARM-specific implementation into one that fits well with this trait. | ||||
| 2025-05-27 | Feat: Moved majority of the code to `arm` module. | Madhav Madhusoodanan | -767/+687 | |
| Reasoning: 1. Majority of code assumes the usage of `Intrinsic` and related types, which is derived from the JSON structure of the ARM intrinsics JSON source file 2. Further commits will start with extracting common parts of the code (eg: Create C/Rust file, Build C/Rust file, etc) | ||||
| 2025-05-26 | std_detect: RISC-V platform guide documentation (non-table part) | Tsukasa OI | -0/+15 | |
| This is a partial revert of a revert, making the commit e907456b2e10622ccd854a3bba8d02ce170b5dbb come around again for non-table part. | ||||
| 2025-05-21 | allow aarch64_softfloat_neon for backwards compatibility | Ralf Jung | -0/+13 | |
| 2025-05-20 | use a tuple to return the condition code | Folkert de Vries | -101/+48 | |
| 2025-05-20 | in `intrinsic-test`, format f16 like C | Folkert de Vries | -1/+102 | |
| 2025-05-20 | use the right load instruction | Folkert de Vries | -3/+3 | |
| 2025-05-20 | `avx512_target_feature` is now stable on nightly | Folkert de Vries | -3/+0 | |
| 2025-05-17 | Correct rustc version for the stabilization of runtime detection of VEX ↵ | sayantn | -5/+5 | |
| variants of avx512 | ||||
| 2025-05-17 | Stabilize runtime detection of VEX variants of avx512 | sayantn | -5/+5 | |
| 2025-05-12 | Partially stabilize LoongArch target features | WANG Rui | -11/+10 | |
