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2020-05-29Rollup merge of #72439 - westernmagic:master, r=AmanieuRalf Jung-0/+11
NVPTX support for new asm! This PR implements the new `asm!` syntax for the `nvptx64-nvidia-cuda` target. r? @Amanieu
2020-05-28Remove rustc-ux-guidelinesEric Huss-90/+0
2020-05-25Update booksEric Huss-0/+0
2020-05-24Update src/doc/unstable-book/src/library-features/asm.mdMichal Sudwoj-1/+1
Co-authored-by: Amanieu d'Antras <amanieu@gmail.com>
2020-05-24Corrected statement about zero-extension in docs.Michal Sudwoj-1/+1
2020-05-24Updated documentationMichal Sudwoj-1/+12
2020-05-21Auto merge of #71718 - NeoRaider:ffi_const_pure, r=Amanieubors-0/+98
Experimentally add `ffi_const` and `ffi_pure` extern fn attributes Add FFI function attributes corresponding to clang/gcc/... `const` and `pure`. Rebased version of #58327 by @gnzlbg with the following changes: - Switched back from the `c_ffi_const` and `c_ffi_pure` naming to `ffi_const` and `ffi_pure`, as I agree with https://github.com/rust-lang/rust/pull/58327#issuecomment-462718772 and this nicely aligns with `ffi_returns_twice` - (Hopefully) took care of all of @hanna-kruppe's change requests in the original PR r? @hanna-kruppe
2020-05-21Rollup merge of #72397 - petrochenkov:tiny, r=AmanieuRalf Jung-1/+1
llvm: Expose tiny code model to users This model is relevant to embedded AArch64 targets and was added to LLVM relatively recently (https://reviews.llvm.org/D49673, mid 2018), so rustc frontend didn't provide access to it with `-C code-model`. The gcc analogue is [`-mcmodel=tiny`](https://gcc.gnu.org/onlinedocs/gcc/AArch64-Options.html). (This is one of the options that are passed directly to LLVM without being interpreted by rustc.) Follow up to https://github.com/rust-lang/rust/pull/72248.
2020-05-21Rollup merge of #72111 - petrochenkov:docstrip, r=ehussRalf Jung-0/+17
rustc-book: Document `-Z strip=val` option cc https://github.com/rust-lang/rust/issues/72110
2020-05-21Auto merge of #70705 - lcnr:generic_discriminant, r=nikomatsakisbors-0/+1
Use `T`'s discriminant type in `mem::Discriminant<T>` instead of `u64`. fixes #70509 Adds the lang-item `discriminant_kind`. Updates the function signature of `intrinsics::discriminant_value`. Adds the *probably permanently unstable* trait `DiscriminantKind`. `mem::Discriminant` should now be smaller in some cases. r? @ghost
2020-05-20llvm: Expose tiny code model to usersVadim Petrochenkov-1/+1
2020-05-20Document `#[ffi_const]` and `#[ffi_pure]` function attributes in unstable bookMatthias Schiffer-0/+98
Based on the work of gnzlbg <gonzalobg88@gmail.com>.
2020-05-19Auto merge of #69171 - Amanieu:new-asm, r=nagisa,nikomatsakisbors-0/+699
Implement new asm! syntax from RFC 2850 This PR implements the new `asm!` syntax proposed in https://github.com/rust-lang/rfcs/pull/2850. # Design A large part of this PR revolves around taking an `asm!` macro invocation and plumbing it through all of the compiler layers down to LLVM codegen. Throughout the various stages, an `InlineAsm` generally consists of 3 components: - The template string, which is stored as an array of `InlineAsmTemplatePiece`. Each piece represents either a literal or a placeholder for an operand (just like format strings). ```rust pub enum InlineAsmTemplatePiece { String(String), Placeholder { operand_idx: usize, modifier: Option<char>, span: Span }, } ``` - The list of operands to the `asm!` (`in`, `[late]out`, `in[late]out`, `sym`, `const`). These are represented differently at each stage of lowering, but follow a common pattern: - `in`, `out` and `inout` all have an associated register class (`reg`) or explicit register (`"eax"`). - `inout` has 2 forms: one with a single expression that is both read from and written to, and one with two separate expressions for the input and output parts. - `out` and `inout` have a `late` flag (`lateout` / `inlateout`) to indicate that the register allocator is allowed to reuse an input register for this output. - `out` and the split variant of `inout` allow `_` to be specified for an output, which means that the output is discarded. This is used to allocate scratch registers for assembly code. - `sym` is a bit special since it only accepts a path expression, which must point to a `static` or a `fn`. - The options set at the end of the `asm!` macro. The only one that is particularly of interest to rustc is `NORETURN` which makes `asm!` return `!` instead of `()`. ```rust bitflags::bitflags! { pub struct InlineAsmOptions: u8 { const PURE = 1 << 0; const NOMEM = 1 << 1; const READONLY = 1 << 2; const PRESERVES_FLAGS = 1 << 3; const NORETURN = 1 << 4; const NOSTACK = 1 << 5; } } ``` ## AST `InlineAsm` is represented as an expression in the AST: ```rust pub struct InlineAsm { pub template: Vec<InlineAsmTemplatePiece>, pub operands: Vec<(InlineAsmOperand, Span)>, pub options: InlineAsmOptions, } pub enum InlineAsmRegOrRegClass { Reg(Symbol), RegClass(Symbol), } pub enum InlineAsmOperand { In { reg: InlineAsmRegOrRegClass, expr: P<Expr>, }, Out { reg: InlineAsmRegOrRegClass, late: bool, expr: Option<P<Expr>>, }, InOut { reg: InlineAsmRegOrRegClass, late: bool, expr: P<Expr>, }, SplitInOut { reg: InlineAsmRegOrRegClass, late: bool, in_expr: P<Expr>, out_expr: Option<P<Expr>>, }, Const { expr: P<Expr>, }, Sym { expr: P<Expr>, }, } ``` The `asm!` macro is implemented in librustc_builtin_macros and outputs an `InlineAsm` AST node. The template string is parsed using libfmt_macros, positional and named operands are resolved to explicit operand indicies. Since target information is not available to macro invocations, validation of the registers and register classes is deferred to AST lowering. ## HIR `InlineAsm` is represented as an expression in the HIR: ```rust pub struct InlineAsm<'hir> { pub template: &'hir [InlineAsmTemplatePiece], pub operands: &'hir [InlineAsmOperand<'hir>], pub options: InlineAsmOptions, } pub enum InlineAsmRegOrRegClass { Reg(InlineAsmReg), RegClass(InlineAsmRegClass), } pub enum InlineAsmOperand<'hir> { In { reg: InlineAsmRegOrRegClass, expr: Expr<'hir>, }, Out { reg: InlineAsmRegOrRegClass, late: bool, expr: Option<Expr<'hir>>, }, InOut { reg: InlineAsmRegOrRegClass, late: bool, expr: Expr<'hir>, }, SplitInOut { reg: InlineAsmRegOrRegClass, late: bool, in_expr: Expr<'hir>, out_expr: Option<Expr<'hir>>, }, Const { expr: Expr<'hir>, }, Sym { expr: Expr<'hir>, }, } ``` AST lowering is where `InlineAsmRegOrRegClass` is converted from `Symbol`s to an actual register or register class. If any modifiers are specified for a template string placeholder, these are validated against the set allowed for that operand type. Finally, explicit registers for inputs and outputs are checked for conflicts (same register used for different operands). ## Type checking Each register class has a whitelist of types that it may be used with. After the types of all operands have been determined, the `intrinsicck` pass will check that these types are in the whitelist. It also checks that split `inout` operands have compatible types and that `const` operands are integers or floats. Suggestions are emitted where needed if a template modifier should be used for an operand based on the type that was passed into it. ## HAIR `InlineAsm` is represented as an expression in the HAIR: ```rust crate enum ExprKind<'tcx> { // [..] InlineAsm { template: &'tcx [InlineAsmTemplatePiece], operands: Vec<InlineAsmOperand<'tcx>>, options: InlineAsmOptions, }, } crate enum InlineAsmOperand<'tcx> { In { reg: InlineAsmRegOrRegClass, expr: ExprRef<'tcx>, }, Out { reg: InlineAsmRegOrRegClass, late: bool, expr: Option<ExprRef<'tcx>>, }, InOut { reg: InlineAsmRegOrRegClass, late: bool, expr: ExprRef<'tcx>, }, SplitInOut { reg: InlineAsmRegOrRegClass, late: bool, in_expr: ExprRef<'tcx>, out_expr: Option<ExprRef<'tcx>>, }, Const { expr: ExprRef<'tcx>, }, SymFn { expr: ExprRef<'tcx>, }, SymStatic { expr: ExprRef<'tcx>, }, } ``` The only significant change compared to HIR is that `Sym` has been lowered to either a `SymFn` whose `expr` is a `Literal` ZST of the `fn`, or a `SymStatic` whose `expr` is a `StaticRef`. ## MIR `InlineAsm` is represented as a `Terminator` in the MIR: ```rust pub enum TerminatorKind<'tcx> { // [..] /// Block ends with an inline assembly block. This is a terminator since /// inline assembly is allowed to diverge. InlineAsm { /// The template for the inline assembly, with placeholders. template: &'tcx [InlineAsmTemplatePiece], /// The operands for the inline assembly, as `Operand`s or `Place`s. operands: Vec<InlineAsmOperand<'tcx>>, /// Miscellaneous options for the inline assembly. options: InlineAsmOptions, /// Destination block after the inline assembly returns, unless it is /// diverging (InlineAsmOptions::NORETURN). destination: Option<BasicBlock>, }, } pub enum InlineAsmOperand<'tcx> { In { reg: InlineAsmRegOrRegClass, value: Operand<'tcx>, }, Out { reg: InlineAsmRegOrRegClass, late: bool, place: Option<Place<'tcx>>, }, InOut { reg: InlineAsmRegOrRegClass, late: bool, in_value: Operand<'tcx>, out_place: Option<Place<'tcx>>, }, Const { value: Operand<'tcx>, }, SymFn { value: Box<Constant<'tcx>>, }, SymStatic { value: Box<Constant<'tcx>>, }, } ``` As part of HAIR lowering, `InOut` and `SplitInOut` operands are lowered to a split form with a separate `in_value` and `out_place`. Semantically, the `InlineAsm` terminator is similar to the `Call` terminator except that it has multiple output places where a `Call` only has a single return place output. The constant promotion pass is used to ensure that `const` operands are actually constants (using the same logic as `#[rustc_args_required_const]`). ## Codegen Operands are lowered one more time before being passed to LLVM codegen: ```rust pub enum InlineAsmOperandRef<'tcx, B: BackendTypes + ?Sized> { In { reg: InlineAsmRegOrRegClass, value: OperandRef<'tcx, B::Value>, }, Out { reg: InlineAsmRegOrRegClass, late: bool, place: Option<PlaceRef<'tcx, B::Value>>, }, InOut { reg: InlineAsmRegOrRegClass, late: bool, in_value: OperandRef<'tcx, B::Value>, out_place: Option<PlaceRef<'tcx, B::Value>>, }, Const { string: String, }, SymFn { instance: Instance<'tcx>, }, SymStatic { def_id: DefId, }, } ``` The operands are lowered to LLVM operands and constraint codes as follow: - `out` and the output part of `inout` operands are added first, as required by LLVM. Late output operands have a `=` prefix added to their constraint code, non-late output operands have a `=&` prefix added to their constraint code. - `in` operands are added normally. - `inout` operands are tied to the matching output operand. - `sym` operands are passed as function pointers or pointers, using the `"s"` constraint. - `const` operands are formatted to a string and directly inserted in the template string. The template string is converted to LLVM form: - `$` characters are escaped as `$$`. - `const` operands are converted to strings and inserted directly. - Placeholders are formatted as `${X:M}` where `X` is the operand index and `M` is the modifier character. Modifiers are converted from the Rust form to the LLVM form. The various options are converted to clobber constraints or LLVM attributes, refer to the [RFC](https://github.com/Amanieu/rfcs/blob/inline-asm/text/0000-inline-asm.md#mapping-to-llvm-ir) for more details. Note that LLVM is sometimes rather picky about what types it accepts for certain constraint codes so we sometimes need to insert conversions to/from a supported type. See the target-specific ISelLowering.cpp files in LLVM for details. # Adding support for new architectures Adding inline assembly support to an architecture is mostly a matter of defining the registers and register classes for that architecture. All the definitions for register classes are located in `src/librustc_target/asm/`. Additionally you will need to implement lowering of these register classes to LLVM constraint codes in `src/librustc_codegen_llvm/asm.rs`.
2020-05-19update libcore, add `discriminant_kind` lang-itemBastian Kauschke-0/+1
2020-05-18Rollup merge of #72290 - elichai:2020-doc-lto, r=wesleywiserDylan DPC-6/+12
Add newer rust versions to linker-plugin-lto.md Hi, This doc got a bit out of date, it's hosted here: https://doc.rust-lang.org/rustc/linker-plugin-lto.html you can check the versions I've added via: ```bash $ rustup install 1.38.0 $ rustc +1.38.0 -vV rustc 1.38.0 (625451e37 2019-09-23) binary: rustc commit-hash: 625451e376bb2e5283fc4741caa0a3e8a2ca4d54 commit-date: 2019-09-23 host: x86_64-unknown-linux-gnu release: 1.38.0 LLVM version: 9.0 $ rustup install 1.43.1 $ rustc +1.43.1 -vV rustc 1.43.1 (8d69840ab 2020-05-04) binary: rustc commit-hash: 8d69840ab92ea7f4d323420088dd8c9775f180cd commit-date: 2020-05-04 host: x86_64-unknown-linux-gnu release: 1.43.1 LLVM version: 9.0 ```
2020-05-18Update unstable book documentation with the latest RFC textAmanieu d'Antras-3/+10
2020-05-18Mark asm unstable book doctests as allow_fail since they don't work with ↵Amanieu d'Antras-14/+14
system LLVM
2020-05-18Fix docsAmanieu d'Antras-13/+27
2020-05-18Add documentation for asm!Amanieu d'Antras-0/+678
2020-05-17Auto merge of #72248 - petrochenkov:codemodel, r=Amanieubors-2/+18
Cleanup and document `-C code-model` r? @Amanieu
2020-05-17Update linker-plugin-lto.md to contain up to rust 1.43Elichai Turkel-6/+12
2020-05-16Rollup merge of #72094 - petrochenkov:overfeature, r=nikicRalf Jung-1/+9
cmdline: Make target features individually overridable Fixes https://github.com/rust-lang/rust/issues/56527 Previously `-C target-feature=+avx2 -C target-feature=+fma` was equivalent to `-C target-feature=+fma` because the later `-C target-feature` option fully overridden previous `-C target-feature`. With this PR `-C target-feature=+avx2 -C target-feature=+fma` is equivalent to `-C target-feature=+avx2,+fma` and the options are combined. I'm not sure where the comma-separated features in a single option came from (clang uses a scheme with single feature per-option), but logically these features are entirely independent options. So they should be overridable individually as well to be more useful in hierarchical build system, and more consistent with other rustc options and clang behavior as well. Target feature options have a few other issues (https://github.com/rust-lang/rust/issues/44815), but fixing those is going to be a bit more invasive.
2020-05-16rustc-book: Document `-C code-model`Vadim Petrochenkov-2/+18
2020-05-12Update booksEric Huss-0/+0
2020-05-11rustc-book: Document `-Z strip=val` optionVadim Petrochenkov-0/+17
2020-05-11cmdline: Make target features individually overridableVadim Petrochenkov-1/+9
2020-05-07Fix `strip-priv-imports` pass name in the rustdoc documentationStanislav Tkach-1/+1
2020-05-05Rollup merge of #71897 - alexcrichton:embed-bitcode-docs, r=nnethercoteDylan DPC-8/+36
Improve docs for embed-bitcode and linker-plugin-lto Follow-up from #71716 I wasn't able to add in time.
2020-05-04Improve docs for embed-bitcode and linker-plugin-ltoAlex Crichton-8/+36
Follow-up from #71716 I wasn't able to add in time.
2020-05-04Add Option to Force Unwind TablesSam Elliott-0/+12
When panic != unwind, `nounwind` is added to all functions for a target. This can cause issues when a panic happens with RUST_BACKTRACE=1, as there needs to be a way to reconstruct the backtrace. There are three possible sources of this information: forcing frame pointers (for which an option exists already), debug info (for which an option exists), or unwind tables. Especially for embedded devices, forcing frame pointers can have code size overheads (RISC-V sees ~10% overheads, ARM sees ~2-3% overheads). In code, it can be the case that debug info is not kept, so it is useful to provide this third option, unwind tables, that users can use to reconstruct the call stack. Reconstructing this stack is harder than with frame pointers, but it is still possible. This commit adds a compiler option which allows a user to force the addition of unwind tables. Unwind tables cannot be disabled on targets that require them for correctness, or when using `-C panic=unwind`.
2020-05-03Implement RFC 2523, `#[cfg(version(..))]`mibac138-0/+34
2020-05-01Rename `bitcode-in-rlib` option to `embed-bitcode`Alex Crichton-33/+27
This commit finishes work first pioneered in #70458 and started in #71528. The `-C bitcode-in-rlib` option, which has not yet reached stable, is renamed to `-C embed-bitcode` since that more accurately reflects what it does now anyway. Various tests and such are updated along the way as well. This'll also need to be backported to the beta channel to ensure we don't accidentally stabilize `-Cbitcode-in-rlib` as well.
2020-04-29Auto merge of #71528 - alexcrichton:no-more-bitcode, r=nnethercotebors-20/+26
Store LLVM bitcode in object files, not compressed This commit is an attempted resurrection of #70458 where LLVM bitcode emitted by rustc into rlibs is stored into object file sections rather than in a separate file. The main rationale for doing this is that when rustc emits bitcode it will no longer use a custom compression scheme which makes it both easier to interoperate with existing tools and also cuts down on compile time since this compression isn't happening. The blocker for this in #70458 turned out to be that native linkers didn't handle the new sections well, causing the sections to either trigger bugs in the linker or actually end up in the final linked artifact. This commit attempts to address these issues by ensuring that native linkers ignore the new sections by inserting custom flags with module-level inline assembly. Note that this does not currently change the API of the compiler at all. The pre-existing `-C bitcode-in-rlib` flag is co-opted to indicate whether the bitcode should be present in the object file or not. Finally, note that an important consequence of this commit, which is also one of its primary purposes, is to enable rustc's `-Clto` bitcode loading to load rlibs produced with `-Clinker-plugin-lto`. The goal here is that when you're building with LTO Cargo will tell rustc to skip codegen of all intermediate crates and only generate LLVM IR. Today rustc will generate both object code and LLVM IR, but the object code is later simply thrown away, wastefully.
2020-04-29Store LLVM bitcode in object files, not compressedAlex Crichton-20/+26
This commit is an attempted resurrection of #70458 where LLVM bitcode emitted by rustc into rlibs is stored into object file sections rather than in a separate file. The main rationale for doing this is that when rustc emits bitcode it will no longer use a custom compression scheme which makes it both easier to interoperate with existing tools and also cuts down on compile time since this compression isn't happening. The blocker for this in #70458 turned out to be that native linkers didn't handle the new sections well, causing the sections to either trigger bugs in the linker or actually end up in the final linked artifact. This commit attempts to address these issues by ensuring that native linkers ignore the new sections by inserting custom flags with module-level inline assembly. Note that this does not currently change the API of the compiler at all. The pre-existing `-C bitcode-in-rlib` flag is co-opted to indicate whether the bitcode should be present in the object file or not. Finally, note that an important consequence of this commit, which is also one of its primary purposes, is to enable rustc's `-Clto` bitcode loading to load rlibs produced with `-Clinker-plugin-lto`. The goal here is that when you're building with LTO Cargo will tell rustc to skip codegen of all intermediate crates and only generate LLVM IR. Today rustc will generate both object code and LLVM IR, but the object code is later simply thrown away, wastefully.
2020-04-28Rollup merge of #71641 - ehuss:update-books, r=ehussDylan DPC-0/+0
Update books ## nomicon 5 commits in 6eb24d6e9c0773d4aee68ed5fca121ce3cdf676a..4d2d275997746d35eabfc4d992dfbdcce2f626ed 2020-04-06 02:21:15 +0200 to 2020-04-27 10:24:52 -0400 - Fix example in FFI, section NPO - Update implementation code of `split_at_mut` - Use rust-lang/rust linkchecker on CI. - Use just `std::_` instead of `::std::_` - Remove illegal space. ## reference 2 commits in 3ce94caed4cf967106c51ae86be5e098f7875f11..ed22e6fbfcb6ce436e9ea3b4bb4a55b2fb50a57e 2020-04-11 17:00:27 +0200 to 2020-04-24 12:46:22 -0700 - Fix grammer for tuple patterns and tuple struct patterns (rust-lang-nursery/reference#794) - Document drop scopes (rust-lang-nursery/reference#514) ## book 2 commits in f5db319e0b19c22964398d56bc63103d669e1bba..e37c0e84e2ef73d3a4ebffda8011db6814a3b02d 2020-04-13 08:06:03 -0500 to 2020-04-26 09:31:36 -0500 - Mention short-circuiting in Appendix 02 (rust-lang/book#2318) - Increase HTTP buffer size and add 'Content-Length' header (rust-lang/book#2246) ## rust-by-example 8 commits in c106d1683c3a2b0960f0f0fb01728cbb19807332..ffc99581689fe2455908aaef5f5cf50dd03bb8f5 2020-04-09 09:14:39 -0300 to 2020-04-24 15:05:04 -0300 - Fix Example -&gt; Examples (rust-lang/rust-by-example#1340) - Make unsuffixed literal plural (rust-lang/rust-by-example#1335) - Ensure example error matches the comment (rust-lang/rust-by-example#1336) - Add missing triple backticks (rust-lang/rust-by-example#1339) - Clarify conditional compilation (rust-lang/rust-by-example#1338) - Clarifies how to customize lib crate name (rust-lang/rust-by-example#1337) - Fix bytes of youkoso in shiftjis (rust-lang/rust-by-example#1333) - Fix possible typo (rust-lang/rust-by-example#1334) ## embedded-book 4 commits in 668fb07b6160b9c468f598e839c1e044db65de30..40beccdf1bb8eb9184a2e3b42db8b8c6e394247f 2020-04-13 12:38:16 +0000 to 2020-04-26 17:44:14 +0000 - Add hint on memory config to GDB debugging section (rust-embedded/book#215) - Adds cargo-generate to installation instructions (rust-embedded/book#213) - collections: Fix example allocator (rust-embedded/book#206) - Flip111/patch 8 (rust-embedded/book#233)
2020-04-28Rollup merge of #71637 - mibac138:cfg-sanitize, r=petrochenkovDylan DPC-10/+8
Minor formatting changes in `cfg-sanitize.md`
2020-04-28Update booksEric Huss-0/+0
2020-04-26unstable-book: Document `-Z tls-model`Vadim Petrochenkov-0/+25
2020-04-26rustc-book: Document `-C relocation-model`Vadim Petrochenkov-4/+39
2020-04-24Minor formatting changes in `cfg-sanitize.md`mibac138-10/+8
2020-04-22Alphabetize the `-C` and `-Z` options.Nicholas Nethercote-215/+215
In the code, test, and docs, because it makes it much easier to find things. Other than adding the comments about alphabetical order, this commit only moves things around.
2020-04-22Add a new option `-Cbitcode-in-rlib`.Nicholas Nethercote-0/+20
It defaults to true, but Cargo will set this to false whenever it can to reduce compile times.
2020-04-19Disallow values for `-C no-*` and `-Z no-*` options again.Nicholas Nethercote-17/+6
With the exception of `-C no-redzone`, because that could take a value before this PR. This partially undoes one of the earlier commits in this PR, which added the ability to take a value to all boolean options that lacked it. The help output for these options looks like this: ``` -C no-vectorize-slp=val -- disable LLVM's SLP vectorization pass ``` The "=val" part is a lie, but hopefully this will be fixed in the future.
2020-04-19Improve codegen option docs.Nicholas Nethercote-84/+101
This commit: - Adds "following values" indicators for all the options that are missing them. - Tweaks some wording and punctuation for consistency. - Rewords some things for clarity. - Removes the `no-integrated-as` entry, because that option was removed in #70345.
2020-04-14Update booksEric Huss-0/+0
2020-04-12Auto merge of #70873 - mark-i-m:update-rdg, r=JohnTitorbors-0/+0
Update rustc-dev-guide This should finally fix toolstate r? @JohnTitor
2020-04-09Fix JSON file_name documentation for macros.Eric Huss-2/+5
2020-04-09Rollup merge of #70918 - tobithiel:fix_forbid_override, r=davidtwcoMazdak Farrokhzad-1/+1
rustc_session: forbid lints override regardless of position Addresses the regression reported in #70819 for command line arguments, but does not address the source code flag regression.
2020-04-08update rusct-dev-guidemark-0/+0
2020-04-07rustc_session: forbid lints override regardless of positionTobias Thiel-1/+1
generated by cgit-pink 1.4.1-3-g733a5 (git 2.37.1) at 2026-02-27 19:05:17 +0000