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2020-07-11Rollup merge of #73715 - MaulingMonkey:pr-natvis-tuples, r=AmanieuManish Goregaokar-1/+81
debuginfo: Mangle tuples to be natvis friendly, typedef basic types These changes are meant to unblock rust-lang/rust#70052 "Update hashbrown to 0.8.0" by allowing the use of `tuple<u64, u64>` as a .natvis expression in MSVC style debuggers (MSVC, WinDbg, CDB, etc.) * f8eb81b does the actual mangling of `(u64, u64)` -> `tuple<u64, 64>` * 24a728a allows `u64` to resolve (fixing `$T1` / `$T2` when used to visualize `HashMap<u64, u64, ...>`)
2020-07-10Rollup merge of #74127 - tamird:allowlist, r=oli-obkManish Goregaokar-53/+69
Avoid "whitelist" Other terms are more inclusive and precise.
2020-07-10Rollup merge of #74103 - ajpaverd:cfguard-msvc-only, r=nikomatsakisManish Goregaokar-7/+12
Only add CFGuard on `windows-msvc` targets As @ollie27 pointed out in #73893, the `cfguard` module flag causes incorrect behavior on `windows-gnu` targets. This patch restricts rustc to only add this flag for `windows-msvc` targets (this may need to be changed if other linkers gain support for CFGuard).
2020-07-10Avoid "whitelist"Tamir Duberstein-53/+69
Other terms are more inclusive and precise.
2020-07-10Only add cfguard module flag on windows-msvcAndrew Paverd-7/+12
2020-07-05Use for<'tcx> fn pointers in Providers, instead of having Providers<'tcx>.Eduard-Mihai Burtescu-4/+4
2020-07-02Rollup merge of #73724 - CryZe:wasm-saturating-casts, r=alexcrichtonManish Goregaokar-2/+65
Use WASM's saturating casts if they are available WebAssembly supports saturating floating point to integer casts behind a target feature. The feature is already available on many browsers. Beginning with 1.45 Rust will start defining the behavior of floating point to integer casts to be saturating as well. For this Rust constructs additional checks on top of the `fptoui` / `fptosi` instructions it emits. Here we introduce the possibility for the codegen backend to construct saturating casts itself and only fall back to constructing the checks ourselves if that is not possible. Resolves part of #73591
2020-07-02Address review comments and add UI testChristopher Serr-2/+2
2020-07-02Add comments and format the codeChristopher Serr-5/+7
2020-07-02Check for feature with pre-interned symbolChristopher Serr-10/+9
2020-07-02Use WASM's saturating casts if they are availableChristopher Serr-2/+64
WebAssembly supports saturating floating point to integer casts behind a target feature. The feature is already available on many browsers. Beginning with 1.45 Rust will start defining the behavior of floating point to integer casts to be saturating as well. For this Rust constructs additional checks on top of the `fptoui` / `fptosi` instructions it emits. Here we introduce the possibility for the codegen backend to construct saturating casts itself and only fall back to constructing the checks ourselves if that is not possible.
2020-06-29add spans to injected coverage countersRich Kadel-7/+211
added regions with counter expressions and counters. Added codegen_llvm/coverageinfo mod for upcoming coverage map Move coverage region collection to CodegenCx finalization Moved from `query coverageinfo` (renamed from `query coverage_data`), as discussed in the PR at: https://github.com/rust-lang/rust/pull/73684#issuecomment-649882503 Address merge conflict in MIR instrument_coverage test The MIR test output format changed for int types. moved debug messages out of block.rs This makes the block.rs calls to add coverage mapping data to the CodegenCx much more concise and readable. move coverage intrinsic handling into llvm impl I realized that having half of the coverage intrinsic handling in `rustc_codegen_ssa` and half in `rustc_codegen_llvm` meant that any non-llvm backend would be bound to the same decisions about how the coverage-related MIR terminators should be handled. To fix this, I moved the non-codegen portion of coverage intrinsic handling into its own trait, and implemented it in `rustc_codegen_llvm` alongside `codegen_intrinsic_call`. I also added the (required?) stubs for the new intrinsics to `IntrepretCx::emulate_intrinsic()`, to ensure calls to this function do not fail if called with these new but known intrinsics. address PR Feedback on 28 June 2020 2:48pm PDT
2020-06-27Rollup merge of #73525 - cuviper:llvm11, r=nikicManish Goregaokar-4/+17
Prepare for LLVM 11 These are just the code changes needed to build with the current LLVM master (version 11). r? @nikic
2020-06-26Rollup merge of #73588 - Amanieu:thumb-fp, r=nagisaManish Goregaokar-0/+4
Fix handling of reserved registers for ARM inline asm `r6` is now disallowed as an operand since LLVM sometimes uses it as a base pointer. The check against using the frame pointer as an operand now takes the platform into account and will block either `r7` or `r11` as appropriate. Fixes #73450 cc @cbiffle
2020-06-26Rollup merge of #72620 - tmiasko:linkage-name, r=eddybManish Goregaokar-12/+6
Omit DW_AT_linkage_name when it is the same as DW_AT_name The DWARF standard suggests that it might be useful to include `DW_AT_linkage_name` when it is *distinct* from the identifier name. Fixes #46487. Fixes #59422.
2020-06-25Prepare for LLVM 11Josh Stone-4/+17
2020-06-25Rollup merge of #73460 - tmandry:variant-lineinfo, r=oli-obkManish Goregaokar-41/+126
Emit line info for generator variants Debuggers should be able to read a generator / async fn state machine and show the line it's suspended at. Eventually, this could grow into an "async stack trace" feature of sorts. While no debugger support this for Rust today, this PR adds the debuginfo necessary for that support to exist. [This gist](https://gist.github.com/tmandry/6d7004fa008684f76809208847459f9b) shows the resulting debuginfo for a simple example. Here's a snippet: ``` 0x00000986: DW_TAG_variant DW_AT_discr_value (0x03) 0x00000988: DW_TAG_member DW_AT_name ("3") DW_AT_type (0x000009bc "Suspend0") DW_AT_decl_file ("/home/tmandry/code/playground/generator-simple.rs") DW_AT_decl_line (6) DW_AT_alignment (8) DW_AT_data_member_location (0x00) ``` The file and line have been added here. The line currently points to the beginning of the statement containing the yield (or await), because that's what the MIR source info points to for the yield terminator. (We may want to point to the yield or await line specifically, but that can be done independently of this change.) Debuggers don't know how to use this kind of info yet. However, we're hoping to experiment with adding such support to Fuchsia's debugger. It would be exciting if someone were interested in adding similar to support to gdb/lldb. r? @oli-obk cc @eddyb @jonas-schievink Part of #73524.
2020-06-25Rollup merge of #73418 - doctorn:variants-intrinsic, r=kennytmManish Goregaokar-1/+1
Add unstable `core::mem::variant_count` intrinsic Adds a new `const fn` intrinsic which can be used to determine the number of variants in an `enum`. I've shown this to a couple of people and they invariably ask 'why on earth?', but there's actually a very neat use case: At the moment, if you want to create an opaque array type that's indexed by an `enum` with one element for each variant, you either have to hard-code the number of variants, add a `LENGTH` variant or use a `Vec`, none of which are suitable in general (number of variants could change; pattern matching `LENGTH` becomes frustrating; might not have `alloc`). By including this intrinsic, it becomes possible to write the following: ```rust #[derive(Copy, Clone)] enum OpaqueIndex { A = 0, B, C, } struct OpaqueVec<T>(Box<[T; std::mem::num_variants::<OpaqueIndex>()]>); impl<T> std::ops::Index<OpaqueIndex> for OpaqueVec<T> { type Output = T; fn index(&self, idx: OpaqueIndex) -> &Self::Output { &self.0[idx as usize] } } ``` (We even have a use cases for this in `rustc` and I plan to use it to re-implement the lang-items table.)
2020-06-24debuginfo: Define int/float types in terms of MSVC-recognized types.MaulingMonkey-1/+81
PDB debug information doesn't appear to be emitted for basic types. By defining u32 as a typedef for unsigned __int32 when targeting MSVC, we allow CDB and other debuggers to recognize "u32" as a type/expression. This in turn unblocks rust-lang#70052 "Update hashbrown to 0.8.0" by allowing $T1 ..= $T3 to resolve, which would otherwise fail to resolve when builtin types fail to parse.
2020-06-24Add generator-debug test for MSVCTyler Mandry-8/+10
..which doesn't use variant types.
2020-06-24Allow calling GeneratorSubsts::variant_name() without substsTyler Mandry-10/+8
2020-06-24Add Artificial flag to generator variantsTyler Mandry-14/+53
2020-06-24Emit line info for generator variantsTyler Mandry-10/+56
2020-06-24Implement intrinsicNathan Corbyn-1/+1
2020-06-23Rollup merge of #73665 - alexcrichton:update-wasm-atomics-feature, r=davidtwcoManish Goregaokar-1/+2
rustc: Modernize wasm checks for atomics This commit modernizes how rustc checks for whether the `atomics` feature is enabled for the wasm target. The `sess.target_features` set is consulted instead of fiddling around with dealing with various aspects of LLVM and that syntax.
2020-06-23Rollup merge of #73488 - richkadel:llvm-coverage-map-gen, r=tmandryManish Goregaokar-21/+14
code coverage foundation for hash and num_counters This PR is the next iteration after PR #73011 (which is still waiting on bors to merge). @wesleywiser - PTAL r? @tmandry (FYI, I'm also working on injecting the coverage maps, in another branch, while waiting for these to merge.) Thanks!
2020-06-23rustc: Modernize wasm checks for atomicsAlex Crichton-1/+2
This commit modernizes how rustc checks for whether the `atomics` feature is enabled for the wasm target. The `sess.target_features` set is consulted instead of fiddling around with dealing with various aspects of LLVM and that syntax.
2020-06-23Rollup merge of #73398 - oli-obk:const_raw_ptr_cmp, r=varkor,RalfJung,nagisaManish Goregaokar-1/+11
A way forward for pointer equality in const eval r? @varkor on the first commit and @RalfJung on the second commit cc #53020
2020-06-22Updated query for num_counters to compute from max indexRich Kadel-0/+3
Also added FIXME comments to note the possible need to accommodate counter increment calls in source-based functions that differ from the function context of the caller instance (e.g., inline functions).
2020-06-22moves coverage data computation from pass to queryRich Kadel-6/+3
2020-06-22implemented query for coverage dataRich Kadel-5/+7
This commit adds a query that allows the CoverageData to be pulled from a call on tcx, avoiding the need to change the `codegen_intrinsic_call()` signature (no need to pass in the FunctionCx or any additional arguments. The commit does not change where/when the CoverageData is computed. It's still done in the `pass`, and saved in the MIR `Body`. See discussion (in progress) here: https://github.com/rust-lang/rust/pull/73488#discussion_r443825646
2020-06-21num_counters to u32, after implementing TypeFoldableRich Kadel-1/+1
2020-06-21Fix handling of reserved registers for ARM inline asmAmanieu d'Antras-0/+4
2020-06-21`icmp` can handle raw pointers just fine, there's no need to cast to int.Oliver Scherer-2/+0
2020-06-19Rollup merge of #73347 - tmiasko:incompatible-sanitizers, r=nikicManish Goregaokar-56/+46
Diagnose use of incompatible sanitizers Emit an error when incompatible sanitizer are configured through command line options. Previously the last one configured prevailed and others were silently ignored. Additionally use a set to represent configured sanitizers, making it possible to enable multiple sanitizers at once. At least in principle, since currently all of them are considered to be incompatible with others.
2020-06-19Rollup merge of #72689 - lcnr:common_str, r=estebankManish Goregaokar-1/+1
add str to common types I already expected this to be the case and it may slightly improve perf. Afaict if we ever want to change str into a lang item this would have to get reverted. As that would be fairly simple I don't believe this to cause any problems in the future.
2020-06-19code coverage foundation for hash and num_countersRich Kadel-23/+14
Replaced dummy values for hash and num_counters with computed values, and refactored InstrumentCoverage pass to simplify injecting more counters per function in upcoming versions. Improved usage documentation and error messaging.
2020-06-19Rollup merge of #73214 - androm3da:hex_inline_asm_00, r=AmanieuManish Goregaokar-0/+4
Add asm!() support for hexagon
2020-06-19Add fuzzy pointer comparison intrinsicsOliver Scherer-1/+13
2020-06-19Rollup merge of #73011 - richkadel:llvm-count-from-mir-pass, r=tmandryRalf Jung-0/+56
first stage of implementing LLVM code coverage This PR replaces #70680 (WIP toward LLVM Code Coverage for Rust) since I am re-implementing the Rust LLVM code coverage feature in a different part of the compiler (in MIR pass(es) vs AST). This PR updates rustc with `-Zinstrument-coverage` option that injects the llvm intrinsic `instrprof.increment()` for code generation. This initial version only injects counters at the top of each function, and does not yet implement the required coverage map. Upcoming PRs will add the coverage map, and add more counters and/or counter expressions for each conditional code branch. Rust compiler MCP https://github.com/rust-lang/compiler-team/issues/278 Relevant issue: #34701 - Implement support for LLVMs code coverage instrumentation ***[I put together some development notes here, under a separate branch.](https://github.com/richkadel/rust/blob/cfa0b21d34ee64e4ebee226101bd2ef0c6757865/src/test/codegen/coverage-experiments/README-THIS-IS-TEMPORARY.md)***
2020-06-19Rollup merge of #72497 - RalfJung:tag-term, r=oli-obkRalf Jung-55/+53
tag/niche terminology cleanup The term "discriminant" was used in two ways throughout the compiler: * every enum variant has a corresponding discriminant, that can be given explicitly with `Variant = N`. * that discriminant is then encoded in memory to store which variant is active -- but this encoded form of the discriminant was also often called "discriminant", even though it is conceptually quite different (e.g., it can be smaller in size, or even use niche-filling). After discussion with @eddyb, this renames the second term to "tag". The way the tag is encoded can be either `TagEncoding::Direct` (formerly `DiscriminantKind::Tag`) or `TagEncoding::Niche` (formerly `DiscrimianntKind::Niche`). This finally resolves some long-standing confusion I had about the handling of variant indices and discriminants, which surfaced in https://github.com/rust-lang/rust/pull/72419. (There is also a `DiscriminantKind` type in libcore, it remains unaffected. I think this corresponds to the discriminant, not the tag, so that seems all right.) r? @eddyb
2020-06-16Add initial asm!() support for hexagonBrian Cain-0/+4
GPRs only
2020-06-15moved instrument_coverage pass, optimized scalar, added FIXMERich Kadel-0/+5
2020-06-15[WIP] injects llvm intrinsic instrprof.increment for coverage reportsRich Kadel-0/+51
This initial version only injects counters at the top of each function. Rust Coverage will require injecting additional counters at each conditional code branch.
2020-06-15add FIXME to EnumTagInfoRalf Jung-0/+3
2020-06-14Diagnose use of incompatible sanitizersTomasz Miąsko-56/+46
Emit an error when incompatible sanitizer are configured through command line options. Previously the last one configured prevailed and others were silently ignored. Additionally use a set to represent configured sanitizers, making it possible to enable multiple sanitizers at once. At least in principle, since currently all of them are considered to be incompatible with others.
2020-06-12Auto merge of #69478 - avr-rust:avr-support-upstream, r=jonas-schievinkbors-0/+4
Enable AVR as a Tier 3 target upstream Tracking issue: #44052. Things intentionally left out of the initial upstream: * The `target_cpu` flag I have made the cleanup suggestions by @jplatte and @jplatte in https://github.com/avr-rust/rust/commit/043550d9db0582add42e5837f636f61acb26b915. Anybody feel free to give the branch a test and see how it fares, or make suggestions on the code patch itself.
2020-06-09Handle assembler warnings properlyAmanieu d'Antras-6/+41
2020-06-09[AVR] Add AVR platform supportJake Goulding-0/+4
2020-06-02Make things build againVadim Petrochenkov-1/+1