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Generate br for all two target SwitchInts
Instead of only for booleans. This means that `if let` also becomes a br.
Apart from making the IR slightly simpler, this is supported by FastISel (#4353).
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Instead of only for booleans. This means that if let also becomes
a br.
Apart from making the IR slightly simpler, this is supported by
FastISel.
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Fix building rustc on and for musl hosts.
This fixes all problems I had when trying to compile rustc on a musl-based distribution (with `crt-static = false` in `config.toml`).
This is a fixed version of what ended up being #50105, making it possible to compile rustc on musl targets.
The differences to the old (now merged and subsequently reverted) pull request are:
- The commit (6d9154a830dd9773fe8a4e34e1fc3dfb1ca6f935) that caused the regression for which the original commits were reverted in #50709 is left out. This means the corresponding bug #36710 is still not fixed with `+crt-static`.
- The test for issue 36710 is skipped for musl targets (until the issue is properly fixed).
- Building cargo-vendor if `crt-static = false` is needed was broken (cargo-vendor links to some shared libraries if they exist on the system and this produces broken binaries with `+crt-static`)
CC @alexcrichton
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This fixes (only for -crt-static) #36710.
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(This is just the data structure changes and some boilerplate match
code that followed from it; the actual emission of these statements
comes in a follow-up commit.)
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Refactor DebruijnIndex to be 0-based
Fixes #49813
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Co-authored-by: csmoe <35686186+csmoe@users.noreply.github.com>
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Add simd math intrinsics and gather/scatter
This PR adds simd math intrinsics for floating-point vectors (sqrt, sin, cos, pow, exp, log, fma, abs, etc.) and the generic simd gather/scatter intrinsics.
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Use `Ident`s for fields in HIR
Continuation of https://github.com/rust-lang/rust/pull/49718, part of https://github.com/rust-lang/rust/issues/49300
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std: Ensure OOM is classified as `nounwind`
OOM can't unwind today, and historically it's been optimized as if it can't
unwind. This accidentally regressed with recent changes to the OOM handler, so
this commit adds in a codegen test to assert that everything gets optimized away
after the OOM function is approrpiately classified as nounwind
Closes #50925
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Don't ICE if crate has no valid crate types left
fixes #50993
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OOM can't unwind today, and historically it's been optimized as if it can't
unwind. This accidentally regressed with recent changes to the OOM handler, so
this commit adds in a codegen test to assert that everything gets optimized away
after the OOM function is approrpiately classified as nounwind
Closes #50925
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This reverts commit 776c632e2a9a044fd134321a9d561e28994ff3ff.
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Rollup of 9 pull requests
Successful merges:
- #50864 (Add NetBSD/arm target specs)
- #50956 (rust-gdb: work around the re-used -d argument in cgdb)
- #50964 (Make sure that queries have predictable symbol names.)
- #50965 (Update LLVM to pull in another wasm fix)
- #50972 (Add -Z no-parallel-llvm flag)
- #50979 (Fix span for type-only arguments)
- #50981 (Shrink `LiveNode`.)
- #50995 (move type out of unsafe block)
- #51011 ( rustdoc: hide macro export statements from docs)
Failed merges:
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rustc_codegen_llvm: remove some debuginfo cruft.
(The second commit passes tests locally but might not on older LLVM versions)
r? @nikomatsakis
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Add -Z no-parallel-llvm flag
Codegen issues commonly only manifest under specific circumstances,
e.g. if multiple codegen units are used and ThinLTO is enabled.
However, these configuration are threaded, making the use of LLVM
debugging facilities hard, as output is interleaved.
This patch adds a -Z no-parallel-llvm flag, which allows disabling
parallelization of codegen and linking, while otherwise preserving
behavior with regard to codegen units and LTO.
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Codegen issues commonly only manifest under specific circumstances,
e.g. if multiple codegen units are used and ThinLTO is enabled.
However, these configuration are threaded, making the use of LLVM
debugging facilities hard, as output is interleaved.
This patch adds a -Z no-parallel-llvm flag, which allows disabling
parallelization of codegen and linking, while otherwise preserving
behavior with regard to codegen units and LTO.
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Don't lint numeric overflows in promoteds in release mode
r? @eddyb
mitigates #50814
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Fix an ICE when attempting to transmute an uninhabited type
Fixes https://github.com/rust-lang/rust/issues/50570.
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Rollup of 8 pull requests
Successful merges:
- #50531 (Cleanup uses of TypeIdHasher and replace them with StableHasher)
- #50819 (Fix potential divide by zero)
- #50827 (Update LLVM to 56c931901cfb85cd6f7ed44c7d7520a8de1edf97)
- #50829 (CheckLoopVisitor: also visit break expressions)
- #50854 (in which the unused shorthand field pattern debacle/saga continues)
- #50858 (Reorder description for snippets in rustdoc documentation)
- #50883 (Fix warning when building stage0 libcore)
- #50889 (Update clippy)
Failed merges:
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Fix potential divide by zero
This should fix #50761
I had trouble reproducing with the provided code, but looking at the stack trace would indicate that this code is the likely cause. I made a number of assumptions here, because I don't have enough context on how the register size is set:
1. I assumed `rest.unit.size.bytes()` can be 0, and it's ok if it's set to 0 before this function is called
2. I assumed that if `rest.unit.size.bytes()` is 0, that we want `rest_count` to also be 0.
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remove semicolon -_-
Add rem_bytes to conditional to avoid error when performing mod by 0
Add test file to confirm compilation passes.
Ensure we don't divide or mod by zero in llvm_type. Include test file from issue.
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r=michaelwoerister
Cleanup uses of TypeIdHasher and replace them with StableHasher
Fixes #50424
r? @michaelwoerister
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