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2019-05-26rename Scalar::Bits to Scalar::Raw and bits field to dataRalf Jung-3/+3
2019-05-23Update wasm_import_module_map and target_features_whitelistJohn Kåre Alsaker-4/+3
2019-05-22Rollup merge of #60973 - nnethercote:fix-file_metadata-more, r=michaelwoeristerMazdak Farrokhzad-34/+34
Avoid symbol interning in `file_metadata`. This commit changes `created_files` so it uses strings directly as keys, rather than symbols derived from the strings. This avoids the cost of having to do the hash table lookups to produce the symbols from the strings. The commit also uses `entry` to avoid doing a repeated hash table lookup (`get` + `insert`). Note that PR #60467 improved this code somewhat; this is a further improvement. r? @davidtwco
2019-05-21Auto merge of #61007 - michaelwoerister:limited-debuginfo, r=alexcrichtonbors-2/+21
debuginfo: Revert to old/more verbose behavior for -Cdebuginfo=1 https://github.com/rust-lang/rust/commit/cff075009 made LLVM emit less debuginfo when compiling with "line-tables-only". The change was essentially correct but the reduced amount of debuginfo broke a number of tools. This commit reverts the change so we get back the old behavior, until we figure out how to do this properly and give external tools to adapt to the new format. See https://github.com/rust-lang/rust/issues/60020 for more info. r? @cuviper cc @jrmuizel & @froydnj
2019-05-21debuginfo: Revert to old/more verbose behavior for -Cdebuginfo=1.Michael Woerister-2/+21
https://github.com/rust-lang/rust/commit/cff075009 made LLVM emit less debuginfo when compiling with "line-tables-only". The change was essentially correct but the reduced amount of debuginfo broke a number of tools. This commit reverts the change so we get back the old behavior, until we figure out how to do this properly and give external tools to adapt to the new format. See https://github.com/rust-lang/rust/issues/60020 for more info.
2019-05-20Avoid symbol interning in `file_metadata`.Nicholas Nethercote-34/+34
This commit changes `created_files` so it uses strings directly as keys, rather than symbols derived from the strings. This avoids the cost of having to do the hash table lookups to produce the symbols from the strings. The commit also uses `entry` to avoid doing a repeated hash table lookup (`get` + `insert`). Note that PR #60467 improved this code somewhat; this is a further improvement.
2019-05-20Auto merge of #60815 - nnethercote:use-Symbol-more-2, r=petrochenkovbors-2/+2
Use `Symbol` even more These patches simplify the code a bit (fewer conversions) and also speed things up a bit (fewer `with_interner` calls). r? @petrochenkov
2019-05-20Introduce `LocalInternedString::intern`.Nicholas Nethercote-2/+2
`LocalInternedString::intern(x)` is preferable to `Symbol::intern(x).as_str()`, because the former involves one call to `with_interner` while the latter involves two.
2019-05-20Rollup merge of #60895 - chandde:master, r=alexcrichtonMazdak Farrokhzad-2/+2
Enable thumbv7a-pc-windows-msvc target build end to end in rust/master With this PR, plus another commit https://github.com/rust-lang-nursery/compiler-builtins/commit/cf98161da7ed5217b6031796f0f60b4dd07148a4, I'm able to build the target thumbv7a-pc-windows-msvc successfully, and I'm able to use the stage2 artifacts to build arm32 projects. The commit in compiler_builtins is in release 0.1.14, the current cargo.lock in rust master still uses 0.1.12, so I bumped the compiler_builtins version in cargo.lock to 0.1.15 The command I used to build rust ``` c:\python27\python.exe x.py build --host x86_64-pc-windows-msvc --build x86_64-pc-windows-msvc --target thumbv7a-pc-windows-msvc --verbose ``` **Changes** 1. update cargolock to use compiler_builtins 0.1.15 2. handle libunwind in libtest for thumv7a the same as what we have for aarch64 3. in llvm codegen add a field in CodegenContext to carry the arch, so later in create_msvc_imps function, the arch can be used to check against "x86", instead of 32 pointer width. Apparently Thumv7a is handled differently than x86. **Background** I'm from Microsoft working on enabling Azure IoTEdge on ARM32 Windows IoTCore, Azure IoTEdge has a component called IoTEdged written in rust as a NT service running on Windows, so we need to enable rust on thumbv7a in order to have full IoTEdge. My colleague had made some heavy lifting and we've been using our private toolchain to build IoTEdged in our devops pipeline, because at that time we cannot build thumbv7a target end to end successfully. This change is a followup to enable the end to end build for thumbv7a-pc-windows-msvc target. **Next step** I'll submit more changes to have this target built nightly in rust/master, to achieve the same availability for aarch64-pc-windows-msvc, indexed here https://rust-lang.github.io/rustup-components-history/aarch64-pc-windows-msvc.html and can be manually installed. **Please do share what takes to make this happen, is there a formal process I need to follow\?**
2019-05-16add targetarch for CodegenContextChandler Deng-2/+2
2019-05-16Auto merge of #60693 - saleemjaffer:refactor_fntype_stuff, r=eddybbors-391/+17
refactor some `FnType` stuff to `rustc::ty::layout` Does work in the direction of #56166.
2019-05-14removes `AbiMethods`Saleem Jaffer-19/+10
2019-05-14refactor completeSaleem Jaffer-377/+12
2019-05-14some more refactor of FnType. Things build nowSaleem Jaffer-8/+299
2019-05-13Pass a `Symbol` to `check_name`, `emit_feature_err`, and related functions.Nicholas Nethercote-72/+74
2019-05-10refactor some `FnType` stuff to `rustc::ty::layout`Saleem Jaffer-291/+0
2019-05-04removing param_env from pointee_info_atSaleem Jaffer-5/+7
2019-05-04adding HasParamEnv traitSaleem Jaffer-1/+13
2019-05-04resolving conflictsSaleem Jaffer-11/+1
2019-05-04impl `pointee_info_at` in TyLayout.Daan de Graaf-2/+2
2019-05-04Add param_env parameter to pointee_info_at.Daan de Graaf-1/+1
An associated type ParamEnv has been added to TyLayoutMethods to facilitate this.
2019-05-04Remove old pointee_info_at body.Daan de Graaf-132/+13
2019-05-04Auto merge of #59897 - tmandry:variantful-generators, r=eddybbors-91/+197
Multi-variant layouts for generators This allows generators to overlap fields using variants, but doesn't do any such overlapping yet. It creates one variant for every state of the generator (unresumed, returned, panicked, plus one for every yield), and puts every stored local in each of the yield-point variants. Required for optimizing generator layouts (#52924). There was quite a lot of refactoring needed for this change. I've done my best in later commits to eliminate assumptions in the code that only certain kinds of types are multi-variant, and to centralize knowledge of the inner mechanics of generators in as few places as possible. This change also emits debuginfo about the fields contained in each variant, as well as preserving debuginfo about stored locals while running in the generator. Also, fixes #59972. Future work: - Use this change for an optimization pass that actually overlaps locals within the generator struct (#52924) - In the type layout fields, don't include locals that are uninitialized for a particular variant, so miri and UB sanitizers can check our memory (see https://github.com/rust-lang/rust/issues/59972#issuecomment-483058172) - Preserve debuginfo scopes across generator yield points
2019-05-03Address review commentsTyler Mandry-7/+7
2019-05-03Split out debuginfo from type info in MIR GeneratorLayoutTyler Mandry-2/+3
2019-05-03Make variant_fields inner an IndexVecTyler Mandry-1/+1
2019-05-03Rollup merge of #60467 - nnethercote:less-symbol-interning, r=davidtwcoMazdak Farrokhzad-10/+14
Avoid repeated interning of static strings. `file_metadata_raw` interns the strings `"<unknown>"` and `""` very frequently. This commit avoids that, which reduces the number of symbols interned significantly and reduces instruction counts by up to 0.5% on some workloads.
2019-05-02Avoid repeated interning of static strings.Nicholas Nethercote-10/+14
`file_metadata_raw` interns the strings `"<unknown>"` and `""` very frequently. This commit avoids that, which reduces the number of symbols interned significantly and reduces instruction counts by up to 0.5% on some workloads.
2019-04-30Move metadata encoding earlier.Nicholas Nethercote-41/+13
This commit separates metadata encoding (`tcx.encode_metadata`) from the creation of the metadata module (which is now handled by `write_compressed_metadata`, formerly `write_metadata`). The metadata encoding now occurs slightly earlier in the pipeline, at the very start of code generation within `start_codegen`. Metadata *writing* still occurs near the end of compilation; that will be moved forward in subsequent commits.
2019-04-29Auto merge of #60006 - nnethercote:json-for-pipelining, r=alexcrichtonbors-1/+1
In JSON output, emit a directive after metadata is generated. To implement pipelining, Cargo needs to know when metadata generation is finished. This is done via a new JSON "directive". Unfortunately, metadata file writing currently occurs very late during compilation, so pipelining won't produce a speed-up. Moving metadata file writing earlier will be a follow-up. r? @alexcrichton
2019-04-30In JSON output, emit a directive after metadata is generated.Nicholas Nethercote-1/+1
To implement pipelining, Cargo needs to know when metadata generation is finished. This commit adds code to do that. Unfortunately, metadata file writing currently occurs very late during compilation, so pipelining won't produce a speed-up. Moving metadata file writing earlier will be a follow-up. The change involves splitting the existing `Emitter::emit` method in two: `Emitter::emit_diagnostic` and `Emitter::emit_directive`. The JSON directives look like this: ``` {"directive":"metadata file written: liba.rmeta"} ``` The functionality is behind the `-Z emit-directives` option, and also requires `--error-format=json`.
2019-04-26Update handling of Tuplevarkor-6/+7
2019-04-25Generalize discriminant info calls for generators and ADTsTyler Mandry-8/+4
2019-04-25Include generator locals as field names in debuginfoTyler Mandry-8/+17
2019-04-25Make generator object debuginfo easier to readTyler Mandry-8/+17
2019-04-25Describe generator variants in debuginfoTyler Mandry-94/+176
2019-04-25Support variantful generatorsTyler Mandry-1/+10
This allows generators to overlap fields using variants.
2019-04-24Rollup merge of #56278 - eddyb:mir-debuginfo-proof, r=nikomatsakisMazdak Farrokhzad-1/+1
Future-proof MIR for dedicated debuginfo. This is #56231 without the last commit (the one that actually moves to `VarDebuginfo`). Nothing should be broken, but it should no longer depend on debuginfo for anything else. r? @nikomatsakis
2019-04-23rustc_codegen_ssa: rename debuginfo_upvar_decls_ops_sequence to ↵Eduard-Mihai Burtescu-1/+1
debuginfo_upvar_ops_sequence.
2019-04-23Rollup merge of #60191 - gnzlbg:f16c, r=alexcrichtonMazdak Farrokhzad-0/+1
Add f16c target_feature This is requires for Intel 16-bit half-precision float intrinsics: https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=fp16&expand=1769 - see companion stdsimd PR: https://github.com/rust-lang-nursery/stdsimd/pull/737. LLVM, Wikipedia CPUID page, and the Intel Dev Manual all call this CPUID feature "F16C", but the Intel intrinsics guide calls this "FP16C" - this is probably a bug in the intrinsics guide which we are tracking here: https://github.com/rust-lang-nursery/stdsimd/issues/738 r? @alexcrichton
2019-04-23Add f16c target_featuregnzlbg-0/+1
2019-04-22Remove double trailing newlinesvarkor-1/+0
2019-04-21Change return type of `TyCtxt::is_static` to boolVadim Petrochenkov-1/+1
Add `TyCtxt::is_mutable_static`
2019-04-20Move cg_llvm/debuginfo/type_names.rs to cg_ssabjorn3-267/+10
2019-04-20Remove cg_llvm/back/link.rsbjorn3-29/+12
2019-04-20Move almost all of cg_llvm/back/link.rs to cg_ssabjorn3-1567/+15
2019-04-20Remove get_reloc_model and target_cpu dependency from most of link.rsbjorn3-14/+18
2019-04-20Make link functions generic over archive builderbjorn3-83/+85
2019-04-20Move some filename constants to cg_ssabjorn3-12/+8
2019-04-20Move some function from cg_llvm/back/link.rs to cg_ssa/back/link.rsbjorn3-373/+3