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2021-10-09Fix min LLVM version for bpf-types testAlessandro Decina-1/+1
Closes #89689
2021-10-04Rollup merge of #83655 - sebpop:arm64-outline-atomics, r=workingjubileeJubilee-0/+16
[aarch64] add target feature outline-atomics Enable outline-atomics by default as enabled in clang by the following commit https://reviews.llvm.org/rGc5e7e649d537067dec7111f3de1430d0fc8a4d11 Performance improves by several orders of magnitude when using the LSE instructions instead of the ARMv8.0 compatible load/store exclusive instructions. Tested on Graviton2 aarch64-linux with x.py build && x.py install && x.py test
2021-10-01Rollup merge of #88820 - hlopko:add_pie_relocation_model, r=petrochenkovManish Goregaokar-0/+73
Add `pie` as another `relocation-model` value MCP: https://github.com/rust-lang/compiler-team/issues/461
2021-10-01Add `pie` as another `relocation-model` valueMarcel Hlopko-0/+73
2021-09-30[aarch64] add target feature outline-atomicsSebastian Pop-0/+16
Enable outline-atomics by default as enabled in clang by the following commit https://reviews.llvm.org/rGc5e7e649d537067dec7111f3de1430d0fc8a4d11 Performance improves by several orders of magnitude when using the LSE instructions instead of the ARMv8.0 compatible load/store exclusive instructions. Tested on Graviton2 aarch64-linux with x.py build && x.py install && x.py test
2021-09-20rustc_codegen_llvm: make sse4.2 imply crc32 for LLVM 14Augie Fackler-0/+12
This fixes compiling things like the `snap` crate after https://reviews.llvm.org/D105462. I added a test that verifies the additional attribute gets specified, and confirmed that I can build cargo with both LLVM 13 and 14 with this change applied.
2021-09-13enum niche allocation grows toward zero if possibleAndreas Liljeqvist-0/+25
2021-09-01Rollup merge of #88350 - programmerjake:add-ppc-cr-xer-clobbers, r=AmanieuMara Bos-0/+12
add support for clobbering xer, cr, and cr[0-7] for asm! on OpenPower/PowerPC Fixes #88315
2021-08-25add support for clobbering xer, cr, and cr[0-7] for asm! on OpenPower/PowerPCJacob Lifshay-0/+12
Fixes #88315
2021-08-24Feat: added explicit register tests; added prefix to check_reg asm stringlinux1-1/+37
2021-08-23Fix: added necessary prefixlinux1-2/+8
2021-08-22Fix: appeased x.py test tidy --blesslinux1-2/+2
2021-08-22Feat: further testing & support for i64 general register uselinux1-6/+46
2021-08-22Fix: moved #[no_mangle]linux1-3/+1
2021-08-22Refactor: added #[no_mangle]linux1-0/+2
2021-08-22Feat: added s390x reg-definitions, constraint codes, and testslinux1-0/+86
2021-06-24Re-Annotate the tests with needs-llvm-componentsSimonas Kazlauskas-4/+13
Doesn't work though, because compiletest doesn't process ignores on a per-revision manner.
2021-06-06Auto merge of #79608 - alessandrod:bpf, r=nagisabors-0/+154
BPF target support This adds `bpfel-unknown-none` and `bpfeb-unknown-none`, two new no_std targets that generate little and big endian BPF. The approach taken is very similar to the cuda target, where `TargetOptions::obj_is_bitcode` is enabled and code generation is done by the linker. I added the targets to `dist-various-2`. There are [some tests](https://github.com/alessandrod/bpf-linker/tree/main/tests/assembly) in bpf-linker and I'm planning to add more. Those are currently not ran as part of rust CI.
2021-05-29BPF: add assembly testAlessandro Decina-0/+154
2021-05-28Fix static relocation model for PowerPC64Boris-Chengbiao Zhou-2/+9
We now also use `should_assume_dso_local()` for declarations and port two additional cases from clang: - Exclude PPC64 [1] - Exclude thread-local variables [2] [1]: https://github.com/llvm/llvm-project/blob/033138ea452f5f493fb5095e5963419905ad12e1/clang/lib/CodeGen/CodeGenModule.cpp#L1038-L1040 [2]: https://github.com/llvm/llvm-project/blob/033138ea452f5f493fb5095e5963419905ad12e1/clang/lib/CodeGen/CodeGenModule.cpp#L1048-L1050
2021-05-19Auto merge of #85276 - Bobo1239:more_dso_local, r=nagisabors-4/+37
Set dso_local for more items Related to https://github.com/rust-lang/rust/pull/83592. (cc `@nagisa)` Noticed that on x86_64 with `relocation-model: static` `R_X86_64_GOTPCREL` relocations were still generated in some cases. (related: https://github.com/Rust-for-Linux/linux/issues/135; Rust-for-Linux needs these fixes to successfully build) First time doing anything with LLVM so not sure whether this is correct but the following are some of the things I've tried to convince myself. ## C equivalent Example from clang which also sets `dso_local` in these cases: `clang-12 -fno-PIC -S -emit-llvm test.c` ```C extern int A; int* a() { return &A; } int B; int* b() { return &B; } ``` ``` ; ModuleID = 'test.c' source_filename = "test.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" `@A` = external dso_local global i32, align 4 `@B` = dso_local global i32 0, align 4 ; Function Attrs: noinline nounwind optnone uwtable define dso_local i32* `@a()` #0 { ret i32* `@A` } ; Function Attrs: noinline nounwind optnone uwtable define dso_local i32* `@b()` #0 { ret i32* `@B` } attributes #0 = { noinline nounwind optnone uwtable "disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" "unsafe-fp-math"="false" "use-soft-float"="false" } !llvm.module.flags = !{!0} !llvm.ident = !{!1} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{!"clang version 12.0.0 (https://github.com/llvm/llvm-project/ b978a93635b584db380274d7c8963c73989944a1)"} ``` `clang-12 -fno-PIC -c test.c` `objdump test.o -r`: ``` test.o: file format elf64-x86-64 RELOCATION RECORDS FOR [.text]: OFFSET TYPE VALUE 0000000000000006 R_X86_64_64 A 0000000000000016 R_X86_64_64 B RELOCATION RECORDS FOR [.eh_frame]: OFFSET TYPE VALUE 0000000000000020 R_X86_64_PC32 .text 0000000000000040 R_X86_64_PC32 .text+0x0000000000000010 ``` ## Comparison to pre-LLVM 12 output `rustc --emit=obj,llvm-ir --target=x86_64-unknown-none-linuxkernel --crate-type rlib test.rs` ```Rust #![feature(no_core, lang_items)] #![no_core] #[lang="sized"] trait Sized {} #[lang="sync"] trait Sync {} #[lang = "drop_in_place"] pub unsafe fn drop_in_place<T: ?Sized>(_: *mut T) {} impl Sync for i32 {} pub static STATIC: i32 = 32; extern { pub static EXT_STATIC: i32; } pub fn a() -> &'static i32 { &STATIC } pub fn b() -> &'static i32 { unsafe {&EXT_STATIC} } ``` `objdump test.o -r` nightly-2021-02-20 (rustc target is `x86_64-linux-kernel`): ``` RELOCATION RECORDS FOR [.text._ZN4test1a17h1024ba65f3424175E]: OFFSET TYPE VALUE 0000000000000007 R_X86_64_32S _ZN4test6STATIC17h3adc41a83746c9ffE RELOCATION RECORDS FOR [.text._ZN4test1b17h86a6a80c1190ac8dE]: OFFSET TYPE VALUE 0000000000000007 R_X86_64_32S EXT_STATIC ``` nightly-2021-05-10: ``` RELOCATION RECORDS FOR [.text._ZN4test1a17he846f03bf37b2d20E]: OFFSET TYPE VALUE 0000000000000007 R_X86_64_GOTPCREL _ZN4test6STATIC17h5a059515bf3d4968E-0x0000000000000004 RELOCATION RECORDS FOR [.text._ZN4test1b17h7e0f7f80fbd91125E]: OFFSET TYPE VALUE 0000000000000007 R_X86_64_GOTPCREL EXT_STATIC-0x0000000000000004 ``` This PR: ``` RELOCATION RECORDS FOR [.text._ZN4test1a17he846f03bf37b2d20E]: OFFSET TYPE VALUE 0000000000000007 R_X86_64_32S _ZN4test6STATIC17h5a059515bf3d4968E RELOCATION RECORDS FOR [.text._ZN4test1b17h7e0f7f80fbd91125E]: OFFSET TYPE VALUE 0000000000000007 R_X86_64_32S EXT_STATIC ```
2021-05-18Set dso_local for more itemsBoris-Chengbiao Zhou-0/+33
2021-05-18Fix assembly test from #83592Boris-Chengbiao Zhou-4/+4
The test case wasn't actually checked for x64 due to a small difference in the name.
2021-05-13Add asm!() support for PowerPC64Dr. Chat-1/+31
2021-05-13Add tests for global_asm!Amanieu d'Antras-0/+14
2021-05-11Add initial asm!() support for PowerPCDr. Chat-0/+165
This includes GPRs and FPRs only
2021-04-29Remove tests introduced or cahnged by PR #77885, which is reverted in this PR.Felix S. Klock II-42/+0
2021-04-11Allow using `-C force-unwind-tables=no` when `panic=unwind`hyd-dev-0/+20
2021-04-06Auto merge of #83592 - nagisa:nagisa/dso_local, r=davidtwcobors-0/+44
Set dso_local for hidden, private and local items This should probably have no real effect in most cases, as e.g. `hidden` visibility already implies `dso_local` (or at least LLVM IR does not preserve the `dso_local` setting if the item is already `hidden`), but it should fix `-Crelocation-model=static` and improve codegen in executables. Note that this PR does not exhaustively port the logic in [clang], only the portion that is necessary to fix a regression from LLVM 12 that relates to `-Crelocation_model=static`. Fixes #83335 [clang]: https://github.com/llvm/llvm-project/blob/3001d080c813da20b329303bf8f45451480e5905/clang/lib/CodeGen/CodeGenModule.cpp#L945-L1039
2021-04-05Disallow the use of high byte registes as operands on x86_64Amanieu d'Antras-4/+5
They are still allowed on x86 though. Fixes #83495
2021-04-03Manually set dso_local when its valid to do soSimonas Kazlauskas-0/+44
This should have no real effect in most cases, as e.g. `hidden` visibility already implies `dso_local` (or at least LLVM IR does not preserve the `dso_local` setting if the item is already `hidden`), but it should fix `-Crelocation-model=static` and improve codegen in executables. Note that this PR does not exhaustively port the logic in [clang]. Only the obviously correct portion and what is necessary to fix a regression from LLVM 12 that relates to `-Crelocation_model=static`. Fixes #83335 [clang]: https://github.com/llvm/llvm-project/blob/3001d080c813da20b329303bf8f45451480e5905/clang/lib/CodeGen/CodeGenModule.cpp#L945-L1039
2021-03-25Mark inline asm tests as requiring LLVM 10.0.1Amanieu d'Antras-11/+11
2021-03-16Adjust `-Ctarget-cpu=native` handling in cg_llvmSimonas Kazlauskas-0/+41
When cg_llvm encounters the `-Ctarget-cpu=native` it computes an explciit set of features that applies to the target in order to correctly compile code for the host CPU (because e.g. `skylake` alone is not sufficient to tell if some of the instructions are available or not). However there were a couple of issues with how we did this. Firstly, the order in which features were overriden wasn't quite right – conceptually you'd expect `-Ctarget-cpu=native` option to override the features that are implicitly set by the target definition. However due to how other `-Ctarget-cpu` values are handled we must adopt the following order of priority: * Features from -Ctarget-cpu=*; are overriden by * Features implied by --target; are overriden by * Features from -Ctarget-feature; are overriden by * function specific features. Another problem was in that the function level `target-features` attribute would overwrite the entire set of the globally enabled features, rather than just the features the `#[target_feature(enable/disable)]` specified. With something like `-Ctarget-cpu=native` we'd end up in a situation wherein a function without `#[target_feature(enable)]` annotation would have a broader set of features compared to a function with one such attribute. This turned out to be a cause of heavy run-time regressions in some code using these function-level attributes in conjunction with `-Ctarget-cpu=native`, for example. With this PR rustc is more careful about specifying the entire set of features for functions that use `#[target_feature(enable/disable)]` or `#[instruction_set]` attributes. Sadly testing the original reproducer for this behaviour is quite impossible – we cannot rely on `-Ctarget-cpu=native` to be anything in particular on developer or CI machines.
2021-02-28Support LLVM 12 in rustcNikita Popov-14/+15
2021-02-1432-bit ARM: Emit `lr` instead of `r14` when specified as an `asm!` output ↵Johnathan Van Why-0/+9
register. On 32-bit ARM platforms, the register `r14` has the alias `lr`. When used as an output register in `asm!`, rustc canonicalizes the name to `r14`. LLVM only knows the register by the name `lr`, and rejects it. This changes rustc's LLVM code generation to output `lr` instead.
2021-01-14Use probe-stack=inline-asm in LLVM 11+Erik Desjardins-0/+42
2020-12-01Add wasm32 support to inline asmGus Caplan-0/+150
2020-10-04Add asm! support for mips64Lzu Tao-64/+90
2020-10-04mips32: Add f64 hard-float supportLzu Tao-0/+24
co-authored-by: Amanieu <amanieu@gmail.com>
2020-09-30Remove useless stringifyLzu Tao-4/+0
2020-09-28Auto merge of #77008 - fortanix:raoul/lvi-tests, r=Mark-Simulacrumbors-0/+70
LVI hardening tests Mitigating the speculative execution LVI attack against SGX enclaves requires compiler changes (i.e., adding lfences). This pull requests adds various tests to check if this happens correctly.
2020-09-27Add MIPS asm! supportLzu Tao-0/+191
This patch also: * Add soft-float supports: only f32 * zero-extend i8/i16 to i32 because MIPS only supports register-length arithmetic. * Update table in asm! chapter in unstable book.
2020-09-25cleaning up codeRaoul Strackx-14/+0
2020-09-25Building libunwind with new CMakeLists.Raoul Strackx-4/+0
The old CMakeLists file of libunwind used the C compiler to compile assembly files. This caused such code not to be hardened.
2020-09-25skeleton check module level assemblyRaoul Strackx-0/+16
2020-09-25rust inline assembly lvi hardening testRaoul Strackx-0/+41
2020-09-22generic load hardening testRaoul Strackx-0/+18
2020-09-22generic ret hardening testRaoul Strackx-0/+13
2020-08-28Fix testAmanieu d'Antras-10/+11
2020-08-26Fix a typo in #75781Amanieu d'Antras-0/+5