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add lint for inline asm labels that look like binary
fixes #94426
Due to a bug/feature in LLVM, labels composed of only the digits `0` and `1` can sometimes be confused with binary literals, even if a binary literal would not be valid in that position.
This PR adds detection for such labels and also as a drive-by change, adds a note to cases such as `asm!(include_str!("file"))` that the label that it found came from an expansion of a macro, it wasn't found in the source code.
I expect this PR to upset some people that were using labels `0:` or `1:` without issue because they never hit the case where LLVM got it wrong, but adding a heuristic to the lint to prevent this is not feasible - it would involve writing a whole assembly parser for every target that we have assembly support for.
[zulip discussion](https://rust-lang.zulipchat.com/#narrow/stream/238009-t-compiler.2Fmeetings/topic/.5Bweekly.5D.202024-06-20/near/445870628)
r? ``@estebank``
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- Move super-fast-paren-parsing test into ui/parser
- Move stmt_expr_attrs test into ui/feature-gates
- Move macro tests into ui/macros
- Move global_asm tests into ui/asm
- Move env tests into ui/process
- Move xcrate tests into ui/cross-crate
- Move unop tests into ui/unop
- Move backtrace tests into ui/backtrace
- Move check-static tests into ui/statics
- Move expr tests into ui/expr
- Move optimization fuel tests into ui/fuel
- Move ffi attribute tests into ui/ffi-attrs
- Move suggestion tests into ui/suggestions
- Move main tests into ui/fn-main
- Move lint tests into ui/lint
- Move repr tests into ui/repr
- Move intrinsics tests into ui/intrinsics
- Move tool lint tests into ui/tool-attributes
- Move return tests into ui/return
- Move pattern tests into ui/patttern
- Move range tests into ui/range
- Move foreign-fn tests into ui/foreign
- Move orphan-check tests into ui/coherence
- Move inference tests into ui/inference
- Reduce ROOT_ENTRY_LIMIT
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There are a few tests that depend on some target features **not** being
enabled by default, and usually they are correct with the default x86-64
target CPU. However, in downstream builds we have modified the default
to fit our distros -- `x86-64-v2` in RHEL 9 and `x86-64-v3` in RHEL 10
-- and the latter especially trips tests that expect not to have AVX.
These cases are few enough that we can just set them back explicitly.
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Tweak value suggestions in `borrowck` and `hir_analysis`
Unify the output of `suggest_assign_value` and `ty_kind_suggestion`.
Ideally we'd make these a single function, but doing so would likely require modify the crate dependency tree.
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Add handling for `String`, `Box`, `Option` and `Result`.
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Since they are never set and don't have impact on the test.
Or for the cfg-panic tests are already tested with check-cfg.
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This also remove safety information from MIR.
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Mention Register Size in `#[warn(asm_sub_register)]`
Fixes #121593
Displays the register size information obtained from `suggest_modifier()` and `default_modifier()`.
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A bit of an inelegant fix but given that the error is created only
after call to `const_eval_poly()` and that the calling function
cannot propagate the error anywhere else, the error has to be
explicitly handled inside `mono_item.rs`.
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* The WASI targets deal with the `main` symbol a bit differently than
native so some `codegen` and `assembly` tests have been ignored.
* All `ignore-emscripten` directives have been updated to
`ignore-wasm32` to be more clear that all wasm targets are ignored and
it's not just Emscripten.
* Most `ignore-wasm32-bare` directives are now gone.
* Some ignore directives for wasm were switched to `needs-unwind`
instead.
* Many `ignore-wasm32*` directives are removed as the tests work with
WASI as opposed to `wasm32-unknown-unknown`.
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Implicitly enable evex512 if avx512 is enabled
LLVM 18 requires the evex512 feature to allow use of zmm registers. LLVM automatically sets it when using a generic CPU, but not when `-C target-cpu` is specified. This will result either in backend legalization crashes, or code unexpectedly using ymm instead of zmm registers.
For now, make sure that `avx512*` features imply `evex512`. Long term we'll probably have to deal with the AVX10 mess somehow.
Fixes https://github.com/rust-lang/rust/issues/121081.
r? `@Amanieu`
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LLVM 18 requires the evex512 feature to allow use of zmm registers.
LLVM automatically sets it when using a generic CPU, but not when
`-C target-cpu` is specified. This will result either in backend
legalization crashes, or code unexpectedly using ymm instead of
zmm registers.
For now, make sure that `avx512*` features imply `evex512`. Long
term we'll probably have to deal with the AVX10 mess somehow.
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This is to make the diff when stabilizing it easier to review.
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Name explicit registers in conflict register errors for inline assembly
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Co-authored-by: Adrian <adrian.iosdev@gmail.com>
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Using hash set instead of vec to weed out duplicates
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Currently the test passes with the LLVM backend as the codegen unit
partitioning logic happens to place both the global_asm!() and the
function which calls the function defined by the global_asm!() in the
same CGU. With the Cranelift backend it breaks however as it will place
all assembly in separate codegen units to be passed to an external
linker.
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