From 02778b3e0ea2ab8818e77811b05f9dc2e01c9028 Mon Sep 17 00:00:00 2001
From: Trevor Gross <tmgross@umich.edu>
Date: Fri, 1 Mar 2024 03:53:26 -0500
Subject: Add `f16` and `f128` LLVM intrinsics

---
 compiler/rustc_codegen_llvm/src/debuginfo/metadata.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'compiler/rustc_codegen_llvm/src/debuginfo')

diff --git a/compiler/rustc_codegen_llvm/src/debuginfo/metadata.rs b/compiler/rustc_codegen_llvm/src/debuginfo/metadata.rs
index 045b6d2b651..1a5f9b42947 100644
--- a/compiler/rustc_codegen_llvm/src/debuginfo/metadata.rs
+++ b/compiler/rustc_codegen_llvm/src/debuginfo/metadata.rs
@@ -695,7 +695,7 @@ impl MsvcBasicName for ty::UintTy {
 
 impl MsvcBasicName for ty::FloatTy {
     fn msvc_basic_name(self) -> &'static str {
-        // FIXME: f16 and f128 have no MSVE representation. We could improve the debuginfo.
+        // FIXME: f16 and f128 have no MSVC representation. We could improve the debuginfo.
         // See: <https://github.com/rust-lang/rust/pull/114607/files#r1454683264>
         match self {
             ty::FloatTy::F16 => "half",
-- 
cgit 1.4.1-3-g733a5