From 84e305dd93cc83cdd9378d0f6f657d8caaabfad8 Mon Sep 17 00:00:00 2001 From: Scott McMurray Date: Fri, 25 Aug 2023 20:06:57 -0700 Subject: Stop emitting non-power-of-two vectors in basic LLVM codegen --- compiler/rustc_codegen_llvm/src/type_of.rs | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'compiler/rustc_codegen_llvm/src') diff --git a/compiler/rustc_codegen_llvm/src/type_of.rs b/compiler/rustc_codegen_llvm/src/type_of.rs index 2be7bce115d..831645579b9 100644 --- a/compiler/rustc_codegen_llvm/src/type_of.rs +++ b/compiler/rustc_codegen_llvm/src/type_of.rs @@ -405,7 +405,11 @@ impl<'tcx> LayoutLlvmExt<'tcx> for TyAndLayout<'tcx> { // Vectors, even for non-power-of-two sizes, have the same layout as // arrays but don't count as aggregate types + // While LLVM theoretically supports non-power-of-two sizes, and they + // often work fine, sometimes x86-isel deals with them horribly + // (see #115212) so for now only use power-of-two ones. if let FieldsShape::Array { count, .. } = self.layout.fields() + && count.is_power_of_two() && let element = self.field(cx, 0) && element.ty.is_integral() { -- cgit 1.4.1-3-g733a5