From 93465e6c3106043b8db7089ff7a1a4d610d8f79f Mon Sep 17 00:00:00 2001 From: Taiki Endo Date: Wed, 29 Jan 2025 06:46:05 +0900 Subject: Mark condition/carry bit as clobbered in C-SKY inline assembly --- compiler/rustc_codegen_llvm/src/asm.rs | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'compiler/rustc_codegen_llvm/src') diff --git a/compiler/rustc_codegen_llvm/src/asm.rs b/compiler/rustc_codegen_llvm/src/asm.rs index 3722d4350a2..be5673eddf9 100644 --- a/compiler/rustc_codegen_llvm/src/asm.rs +++ b/compiler/rustc_codegen_llvm/src/asm.rs @@ -286,7 +286,9 @@ impl<'ll, 'tcx> AsmBuilderMethods<'tcx> for Builder<'_, 'll, 'tcx> { InlineAsmArch::M68k => { constraints.push("~{ccr}".to_string()); } - InlineAsmArch::CSKY => {} + InlineAsmArch::CSKY => { + constraints.push("~{psr}".to_string()); + } } } if !options.contains(InlineAsmOptions::NOMEM) { -- cgit 1.4.1-3-g733a5 From e11e2b4d091635fad78d25c9ba444627ca094677 Mon Sep 17 00:00:00 2001 From: Jubilee Young Date: Sun, 9 Feb 2025 23:05:51 -0800 Subject: compiler: internally merge `Conv::PtxKernel` into `GpuKernel` It is speculated that these two can be conceptually merged, and it can start by ripping out rustc's notion of the PtxKernel call convention. Leave the ExternAbi for now, but the nvptx target now should see it as just a different way to spell Conv::GpuKernel. --- compiler/rustc_codegen_llvm/src/abi.rs | 1 - compiler/rustc_smir/src/rustc_smir/convert/abi.rs | 1 - compiler/rustc_target/src/callconv/mod.rs | 6 ++---- compiler/rustc_target/src/json.rs | 1 - compiler/rustc_ty_utils/src/abi.rs | 2 +- 5 files changed, 3 insertions(+), 8 deletions(-) (limited to 'compiler/rustc_codegen_llvm/src') diff --git a/compiler/rustc_codegen_llvm/src/abi.rs b/compiler/rustc_codegen_llvm/src/abi.rs index 685b2f37c9c..e575e9830ac 100644 --- a/compiler/rustc_codegen_llvm/src/abi.rs +++ b/compiler/rustc_codegen_llvm/src/abi.rs @@ -687,7 +687,6 @@ impl llvm::CallConv { Conv::AvrNonBlockingInterrupt => llvm::AvrNonBlockingInterrupt, Conv::ArmAapcs => llvm::ArmAapcsCallConv, Conv::Msp430Intr => llvm::Msp430Intr, - Conv::PtxKernel => llvm::PtxKernel, Conv::X86Fastcall => llvm::X86FastcallCallConv, Conv::X86Intr => llvm::X86_Intr, Conv::X86Stdcall => llvm::X86StdcallCallConv, diff --git a/compiler/rustc_smir/src/rustc_smir/convert/abi.rs b/compiler/rustc_smir/src/rustc_smir/convert/abi.rs index 4a03ff4beae..fb2e838cdc9 100644 --- a/compiler/rustc_smir/src/rustc_smir/convert/abi.rs +++ b/compiler/rustc_smir/src/rustc_smir/convert/abi.rs @@ -105,7 +105,6 @@ impl<'tcx> Stable<'tcx> for callconv::Conv { Conv::CCmseNonSecureCall => CallConvention::CCmseNonSecureCall, Conv::CCmseNonSecureEntry => CallConvention::CCmseNonSecureEntry, Conv::Msp430Intr => CallConvention::Msp430Intr, - Conv::PtxKernel => CallConvention::PtxKernel, Conv::X86Fastcall => CallConvention::X86Fastcall, Conv::X86Intr => CallConvention::X86Intr, Conv::X86Stdcall => CallConvention::X86Stdcall, diff --git a/compiler/rustc_target/src/callconv/mod.rs b/compiler/rustc_target/src/callconv/mod.rs index 50ac6c8fcde..ffc35f9a3be 100644 --- a/compiler/rustc_target/src/callconv/mod.rs +++ b/compiler/rustc_target/src/callconv/mod.rs @@ -543,8 +543,6 @@ pub enum Conv { Msp430Intr, - PtxKernel, - GpuKernel, X86Fastcall, @@ -701,7 +699,8 @@ impl<'a, Ty> FnAbi<'a, Ty> { "sparc" => sparc::compute_abi_info(cx, self), "sparc64" => sparc64::compute_abi_info(cx, self), "nvptx64" => { - if cx.target_spec().adjust_abi(abi, self.c_variadic) == ExternAbi::PtxKernel { + let abi = cx.target_spec().adjust_abi(abi, self.c_variadic); + if abi == ExternAbi::PtxKernel || abi == ExternAbi::GpuKernel { nvptx64::compute_ptx_kernel_abi_info(cx, self) } else { nvptx64::compute_abi_info(self) @@ -860,7 +859,6 @@ impl FromStr for Conv { "CCmseNonSecureCall" => Ok(Conv::CCmseNonSecureCall), "CCmseNonSecureEntry" => Ok(Conv::CCmseNonSecureEntry), "Msp430Intr" => Ok(Conv::Msp430Intr), - "PtxKernel" => Ok(Conv::PtxKernel), "X86Fastcall" => Ok(Conv::X86Fastcall), "X86Intr" => Ok(Conv::X86Intr), "X86Stdcall" => Ok(Conv::X86Stdcall), diff --git a/compiler/rustc_target/src/json.rs b/compiler/rustc_target/src/json.rs index 15cf7e195db..8d6f8f4c6f6 100644 --- a/compiler/rustc_target/src/json.rs +++ b/compiler/rustc_target/src/json.rs @@ -105,7 +105,6 @@ impl ToJson for crate::callconv::Conv { Self::CCmseNonSecureCall => "CCmseNonSecureCall", Self::CCmseNonSecureEntry => "CCmseNonSecureEntry", Self::Msp430Intr => "Msp430Intr", - Self::PtxKernel => "PtxKernel", Self::X86Fastcall => "X86Fastcall", Self::X86Intr => "X86Intr", Self::X86Stdcall => "X86Stdcall", diff --git a/compiler/rustc_ty_utils/src/abi.rs b/compiler/rustc_ty_utils/src/abi.rs index 169f3a78c26..25926c871dd 100644 --- a/compiler/rustc_ty_utils/src/abi.rs +++ b/compiler/rustc_ty_utils/src/abi.rs @@ -290,7 +290,7 @@ fn conv_from_spec_abi(tcx: TyCtxt<'_>, abi: ExternAbi, c_variadic: bool) -> Conv Aapcs { .. } => Conv::ArmAapcs, CCmseNonSecureCall => Conv::CCmseNonSecureCall, CCmseNonSecureEntry => Conv::CCmseNonSecureEntry, - PtxKernel => Conv::PtxKernel, + PtxKernel => Conv::GpuKernel, Msp430Interrupt => Conv::Msp430Intr, X86Interrupt => Conv::X86Intr, GpuKernel => Conv::GpuKernel, -- cgit 1.4.1-3-g733a5 From cde7e805ad48e8766a07c95c2046693c6a6e236c Mon Sep 17 00:00:00 2001 From: Flakebi Date: Mon, 10 Feb 2025 21:38:44 +0100 Subject: Cast allocas to default address space Pointers for variables all need to be in the same address space for correct compilation. Therefore ensure that even if an `alloca` is created in a different address space, it is casted to the default address space before its value is used. This is necessary for the amdgpu target and others where the default address space for `alloca`s is not 0. For example the following code compiles incorrectly when not casting the address space to the default one: ```rust fn f(p: *const i8 /* addrspace(0) */) -> *const i8 /* addrspace(0) */ { let local = 0i8; /* addrspace(5) */ let res = if cond { p } else { &raw const local }; res } ``` results in ```llvm %local = alloca addrspace(5) i8 %res = alloca addrspace(5) ptr if: ; Store 64-bit flat pointer store ptr %p, ptr addrspace(5) %res else: ; Store 32-bit scratch pointer store ptr addrspace(5) %local, ptr addrspace(5) %res ret: ; Load and return 64-bit flat pointer %res.load = load ptr, ptr addrspace(5) %res ret ptr %res.load ``` For amdgpu, `addrspace(0)` are 64-bit pointers, `addrspace(5)` are 32-bit pointers. The above code may store a 32-bit pointer and read it back as a 64-bit pointer, which is obviously wrong and cannot work. Instead, we need to `addrspacecast %local to ptr addrspace(0)`, then we store and load the correct type. --- compiler/rustc_codegen_llvm/src/builder.rs | 6 ++++-- tests/codegen/amdgpu-addrspacecast.rs | 18 ++++++++++++++++++ 2 files changed, 22 insertions(+), 2 deletions(-) create mode 100644 tests/codegen/amdgpu-addrspacecast.rs (limited to 'compiler/rustc_codegen_llvm/src') diff --git a/compiler/rustc_codegen_llvm/src/builder.rs b/compiler/rustc_codegen_llvm/src/builder.rs index ab0e43e60a4..fbeedef314d 100644 --- a/compiler/rustc_codegen_llvm/src/builder.rs +++ b/compiler/rustc_codegen_llvm/src/builder.rs @@ -421,7 +421,8 @@ impl<'a, 'll, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'll, 'tcx> { unsafe { let alloca = llvm::LLVMBuildAlloca(bx.llbuilder, ty, UNNAMED); llvm::LLVMSetAlignment(alloca, align.bytes() as c_uint); - alloca + // Cast to default addrspace if necessary + llvm::LLVMBuildPointerCast(bx.llbuilder, alloca, self.cx().type_ptr(), UNNAMED) } } @@ -430,7 +431,8 @@ impl<'a, 'll, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'll, 'tcx> { let alloca = llvm::LLVMBuildArrayAlloca(self.llbuilder, self.cx().type_i8(), size, UNNAMED); llvm::LLVMSetAlignment(alloca, align.bytes() as c_uint); - alloca + // Cast to default addrspace if necessary + llvm::LLVMBuildPointerCast(self.llbuilder, alloca, self.cx().type_ptr(), UNNAMED) } } diff --git a/tests/codegen/amdgpu-addrspacecast.rs b/tests/codegen/amdgpu-addrspacecast.rs new file mode 100644 index 00000000000..7fe630a7efa --- /dev/null +++ b/tests/codegen/amdgpu-addrspacecast.rs @@ -0,0 +1,18 @@ +// Check that pointers are casted to addrspace(0) before they are used + +//@ compile-flags: --crate-type=rlib --target=amdgcn-amd-amdhsa -Ctarget-cpu=gfx900 +//@ needs-llvm-components: amdgpu +//@ add-core-stubs +#![feature(no_core)] +#![no_core] + +extern crate minicore; + +// CHECK-LABEL: @ref_of_local +// CHECK: [[alloca:%[0-9]]] = alloca +// CHECK: %i = addrspacecast ptr addrspace(5) [[alloca]] to ptr +#[no_mangle] +pub fn ref_of_local(f: fn(&i32)) { + let i = 0; + f(&i); +} -- cgit 1.4.1-3-g733a5