From fe8ae57645f1cd8d99709d7197d1eab55d2e4270 Mon Sep 17 00:00:00 2001 From: Caleb Zulawski Date: Wed, 10 Nov 2021 01:54:28 +0000 Subject: Add comment regarding bit order --- compiler/rustc_codegen_llvm/src/intrinsic.rs | 3 +++ 1 file changed, 3 insertions(+) (limited to 'compiler/rustc_codegen_llvm/src') diff --git a/compiler/rustc_codegen_llvm/src/intrinsic.rs b/compiler/rustc_codegen_llvm/src/intrinsic.rs index 99de11bc2c4..924bb803b36 100644 --- a/compiler/rustc_codegen_llvm/src/intrinsic.rs +++ b/compiler/rustc_codegen_llvm/src/intrinsic.rs @@ -1072,6 +1072,9 @@ fn generic_simd_intrinsic( // * an unsigned integer // * an array of `u8` // If the vector has less than 8 lanes, a u8 is returned with zeroed trailing bits. + // + // The bit order of the result depends on the byte endianness, LSB-first for little + // endian and MSB-first for big endian. let expected_int_bits = in_len.max(8); let expected_bytes = expected_int_bits / 8 + ((expected_int_bits % 8 > 0) as u64); -- cgit 1.4.1-3-g733a5