From 9589eb95d2872337e932c8b5dc26bdb5cb3dc15b Mon Sep 17 00:00:00 2001
From: DianQK <dianqk@dianqk.net>
Date: Thu, 29 Aug 2024 18:12:31 +0800
Subject: Add `-Zlint-llvm-ir`

---
 compiler/rustc_codegen_ssa/src/back/write.rs | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'compiler/rustc_codegen_ssa/src')

diff --git a/compiler/rustc_codegen_ssa/src/back/write.rs b/compiler/rustc_codegen_ssa/src/back/write.rs
index bea12747a51..7d352ae9118 100644
--- a/compiler/rustc_codegen_ssa/src/back/write.rs
+++ b/compiler/rustc_codegen_ssa/src/back/write.rs
@@ -111,6 +111,7 @@ pub struct ModuleConfig {
     // Miscellaneous flags. These are mostly copied from command-line
     // options.
     pub verify_llvm_ir: bool,
+    pub lint_llvm_ir: bool,
     pub no_prepopulate_passes: bool,
     pub no_builtins: bool,
     pub time_module: bool,
@@ -236,6 +237,7 @@ impl ModuleConfig {
             bc_cmdline: sess.target.bitcode_llvm_cmdline.to_string(),
 
             verify_llvm_ir: sess.verify_llvm_ir(),
+            lint_llvm_ir: sess.opts.unstable_opts.lint_llvm_ir,
             no_prepopulate_passes: sess.opts.cg.no_prepopulate_passes,
             no_builtins: no_builtins || sess.target.no_builtins,
 
-- 
cgit 1.4.1-3-g733a5