From 9a47f74bfe0276fdac849da8d71aa9378ed9affb Mon Sep 17 00:00:00 2001
From: Jonas Schievink <jonasschievink@gmail.com>
Date: Sun, 11 Oct 2020 01:14:12 +0200
Subject: Use SmallVec in SwitchTargets

This allows building common SwitchTargets (eg. for `if`s) without
allocation.
---
 compiler/rustc_codegen_ssa/src/mir/block.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'compiler/rustc_codegen_ssa/src')

diff --git a/compiler/rustc_codegen_ssa/src/mir/block.rs b/compiler/rustc_codegen_ssa/src/mir/block.rs
index 8d57ccdba6d..353189ae1f0 100644
--- a/compiler/rustc_codegen_ssa/src/mir/block.rs
+++ b/compiler/rustc_codegen_ssa/src/mir/block.rs
@@ -196,7 +196,7 @@ impl<'a, 'tcx, Bx: BuilderMethods<'a, 'tcx>> FunctionCx<'a, 'tcx, Bx> {
         mut bx: Bx,
         discr: &mir::Operand<'tcx>,
         switch_ty: Ty<'tcx>,
-        targets: &SwitchTargets<'tcx>,
+        targets: &SwitchTargets,
     ) {
         let discr = self.codegen_operand(&mut bx, &discr);
         // `switch_ty` is redundant, sanity-check that.
-- 
cgit 1.4.1-3-g733a5