From 04099b663c1ee252be058f27147d2e6cfec9ec5f Mon Sep 17 00:00:00 2001 From: Henri Lunnikivi Date: Thu, 19 Sep 2024 13:24:21 +0300 Subject: Update target fns to latest main --- .../rustc_target/src/spec/targets/riscv32e_unknown_none_elf.rs | 8 +++++++- .../rustc_target/src/spec/targets/riscv32em_unknown_none_elf.rs | 8 +++++++- .../rustc_target/src/spec/targets/riscv32emc_unknown_none_elf.rs | 8 +++++++- 3 files changed, 21 insertions(+), 3 deletions(-) (limited to 'compiler') diff --git a/compiler/rustc_target/src/spec/targets/riscv32e_unknown_none_elf.rs b/compiler/rustc_target/src/spec/targets/riscv32e_unknown_none_elf.rs index 9aeb591cb57..b1f52973c10 100644 --- a/compiler/rustc_target/src/spec/targets/riscv32e_unknown_none_elf.rs +++ b/compiler/rustc_target/src/spec/targets/riscv32e_unknown_none_elf.rs @@ -1,11 +1,17 @@ use crate::spec::{Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetOptions}; -pub fn target() -> Target { +pub(crate) fn target() -> Target { Target { // The below `data_layout` is explicitly specified by the ilp32e ABI in LLVM. See also // `options.llvm_abiname`. data_layout: "e-m:e-p:32:32-i64:64-n32-S32".into(), llvm_target: "riscv32".into(), + metadata: crate::spec::TargetMetadata { + description: Some("Bare RISC-V (RV32E ISA)".into()), + tier: Some(3), + host_tools: Some(false), + std: Some(false), + }, pointer_width: 32, arch: "riscv32".into(), diff --git a/compiler/rustc_target/src/spec/targets/riscv32em_unknown_none_elf.rs b/compiler/rustc_target/src/spec/targets/riscv32em_unknown_none_elf.rs index 07b1a0228a2..feeaa48778d 100644 --- a/compiler/rustc_target/src/spec/targets/riscv32em_unknown_none_elf.rs +++ b/compiler/rustc_target/src/spec/targets/riscv32em_unknown_none_elf.rs @@ -1,11 +1,17 @@ use crate::spec::{Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetOptions}; -pub fn target() -> Target { +pub(crate) fn target() -> Target { Target { // The below `data_layout` is explicitly specified by the ilp32e ABI in LLVM. See also // `options.llvm_abiname`. data_layout: "e-m:e-p:32:32-i64:64-n32-S32".into(), llvm_target: "riscv32".into(), + metadata: crate::spec::TargetMetadata { + description: Some("Bare RISC-V (RV32EM ISA)".into()), + tier: Some(3), + host_tools: Some(false), + std: Some(false), + }, pointer_width: 32, arch: "riscv32".into(), diff --git a/compiler/rustc_target/src/spec/targets/riscv32emc_unknown_none_elf.rs b/compiler/rustc_target/src/spec/targets/riscv32emc_unknown_none_elf.rs index 18da14a00d4..45d73c13233 100644 --- a/compiler/rustc_target/src/spec/targets/riscv32emc_unknown_none_elf.rs +++ b/compiler/rustc_target/src/spec/targets/riscv32emc_unknown_none_elf.rs @@ -1,11 +1,17 @@ use crate::spec::{Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetOptions}; -pub fn target() -> Target { +pub(crate) fn target() -> Target { Target { // The below `data_layout` is explicitly specified by the ilp32e ABI in LLVM. See also // `options.llvm_abiname`. data_layout: "e-m:e-p:32:32-i64:64-n32-S32".into(), llvm_target: "riscv32".into(), + metadata: crate::spec::TargetMetadata { + description: Some("Bare RISC-V (RV32EMC ISA)".into()), + tier: Some(3), + host_tools: Some(false), + std: Some(false), + }, pointer_width: 32, arch: "riscv32".into(), -- cgit 1.4.1-3-g733a5