From 2d5f62fb48536d69aa7de0d7504df278271ccf25 Mon Sep 17 00:00:00 2001
From: David Craven <david@craven.ch>
Date: Tue, 24 Jul 2018 12:03:28 +0200
Subject: [RISCV] Enable LLVM backend.

---
 config.toml.example | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'config.toml.example')

diff --git a/config.toml.example b/config.toml.example
index 99073416334..cc40e96b316 100644
--- a/config.toml.example
+++ b/config.toml.example
@@ -62,7 +62,7 @@
 # not built by default and the experimental Rust compilation targets that depend
 # on them will not work unless the user opts in to building them. By default the
 # `WebAssembly` target is enabled when compiling LLVM from scratch.
-#experimental-targets = "WebAssembly"
+#experimental-targets = "WebAssembly;RISCV"
 
 # Cap the number of parallel linker invocations when compiling LLVM.
 # This can be useful when building LLVM with debug info, which significantly
-- 
cgit 1.4.1-3-g733a5