From 184fb08037d0349b715d6926af7ec54595607151 Mon Sep 17 00:00:00 2001 From: Sam Elliott Date: Fri, 2 Aug 2019 15:39:43 +0100 Subject: rustbuild: RISC-V is no longer an experimental LLVM target This commit moves RISC-V from the experimental LLVM targets to the regular LLVM targets. RISC-V was made non-experimental in https://reviews.llvm.org/rL366399 I have also sorted the list of LLVM targets, and changed the code around setting llvm_exp_targets (and its default) to match the code setting llvm_targets (and its default), ensuring future changes to the defaults, as LLVM targets become stable, affect as few places as possible. --- src/bootstrap/config.rs | 5 ++--- src/bootstrap/native.rs | 7 +++++-- 2 files changed, 7 insertions(+), 5 deletions(-) (limited to 'src/bootstrap') diff --git a/src/bootstrap/config.rs b/src/bootstrap/config.rs index 20d7548df5c..5a5f4ac7252 100644 --- a/src/bootstrap/config.rs +++ b/src/bootstrap/config.rs @@ -75,7 +75,7 @@ pub struct Config { pub llvm_link_shared: bool, pub llvm_clang_cl: Option, pub llvm_targets: Option, - pub llvm_experimental_targets: String, + pub llvm_experimental_targets: Option, pub llvm_link_jobs: Option, pub llvm_version_suffix: Option, pub llvm_use_linker: Option, @@ -524,8 +524,7 @@ impl Config { set(&mut config.llvm_static_stdcpp, llvm.static_libstdcpp); set(&mut config.llvm_link_shared, llvm.link_shared); config.llvm_targets = llvm.targets.clone(); - config.llvm_experimental_targets = llvm.experimental_targets.clone() - .unwrap_or_else(|| "WebAssembly;RISCV".to_string()); + config.llvm_experimental_targets = llvm.experimental_targets.clone(); config.llvm_link_jobs = llvm.link_jobs; config.llvm_version_suffix = llvm.version_suffix.clone(); config.llvm_clang_cl = llvm.clang_cl.clone(); diff --git a/src/bootstrap/native.rs b/src/bootstrap/native.rs index bf824775ccb..9405ae4b155 100644 --- a/src/bootstrap/native.rs +++ b/src/bootstrap/native.rs @@ -125,14 +125,17 @@ impl Step for Llvm { } else { match builder.config.llvm_targets { Some(ref s) => s, - None => "X86;ARM;AArch64;Mips;PowerPC;SystemZ;MSP430;Sparc;NVPTX;Hexagon", + None => "AArch64;ARM;Hexagon;MSP430;Mips;NVPTX;PowerPC;RISCV;Sparc;SystemZ;X86", } }; let llvm_exp_targets = if self.emscripten { "" } else { - &builder.config.llvm_experimental_targets[..] + match builder.config.llvm_experimental_targets { + Some(ref s) => s, + None => "WebAssembly", + } }; let assertions = if builder.config.llvm_assertions {"ON"} else {"OFF"}; -- cgit 1.4.1-3-g733a5