From eea66e1697ea3cea5f8b56f0d1ea5ff968096fd7 Mon Sep 17 00:00:00 2001 From: Brian Anderson Date: Fri, 23 May 2014 11:02:04 -0700 Subject: core: Document simd mod --- src/libcore/simd.rs | 26 +++++++++++++++++++++++++- 1 file changed, 25 insertions(+), 1 deletion(-) (limited to 'src/libcore') diff --git a/src/libcore/simd.rs b/src/libcore/simd.rs index c0825c3fc29..6f860dfdbcd 100644 --- a/src/libcore/simd.rs +++ b/src/libcore/simd.rs @@ -8,7 +8,31 @@ // option. This file may not be copied, modified, or distributed // except according to those terms. -//! SIMD vectors +//! SIMD vectors. +//! +//! These types can be used for accessing basic SIMD operations. Each of them +//! implements the standard arithmetic operator traits (Add, Sub, Mul, Div, +//! Rem, Shl, Shr) through compiler magic, rather than explicitly. Currently +//! comparison operators are not implemented. To use SSE3+, you must enable +//! the features, like `-C target-feature=sse3,sse4.1,sse4.2`, or a more +//! specific `target-cpu`. No other SIMD intrinsics or high-level wrappers are +//! provided beyond this module. +//! +//! ```rust +//! #[allow(experimental)]; +//! +//! fn main() { +//! use std::simd::f32x4; +//! let a = f32x4(40.0, 41.0, 42.0, 43.0); +//! let b = f32x4(1.0, 1.1, 3.4, 9.8); +//! println!("{}", a + b); +//! } +//! ``` +//! +//! ## Stability Note +//! +//! These are all experimental. The inferface may change entirely, without +//! warning. #![allow(non_camel_case_types)] #![allow(missing_doc)] -- cgit 1.4.1-3-g733a5