From b14c7337db5861288afc3b26ba006859ed052d39 Mon Sep 17 00:00:00 2001 From: bjorn3 <17426603+bjorn3@users.noreply.github.com> Date: Mon, 22 Aug 2022 18:53:10 +0000 Subject: Update to Cranelift 0.87.0 --- src/abi/pass_mode.rs | 2 +- src/base.rs | 2 +- src/debuginfo/line_info.rs | 2 +- src/inline_asm.rs | 2 +- src/value_and_place.rs | 4 ++-- 5 files changed, 6 insertions(+), 6 deletions(-) (limited to 'src') diff --git a/src/abi/pass_mode.rs b/src/abi/pass_mode.rs index 3192575b8ad..f4ad76b3bab 100644 --- a/src/abi/pass_mode.rs +++ b/src/abi/pass_mode.rs @@ -184,7 +184,7 @@ pub(super) fn from_casted_value<'tcx>( let abi_params = cast_target_to_abi_params(cast); let abi_param_size: u32 = abi_params.iter().map(|param| param.value_type.bytes()).sum(); let layout_size = u32::try_from(layout.size.bytes()).unwrap(); - let stack_slot = fx.bcx.create_stack_slot(StackSlotData { + let stack_slot = fx.bcx.create_sized_stack_slot(StackSlotData { kind: StackSlotKind::ExplicitSlot, // FIXME Don't force the size to a multiple of 16 bytes once Cranelift gets a way to // specify stack slot alignment. diff --git a/src/base.rs b/src/base.rs index 5f6d9f374fd..3a4c2b84549 100644 --- a/src/base.rs +++ b/src/base.rs @@ -202,7 +202,7 @@ fn compile_fn<'tcx>( &clif_comments, ); - if let Some(disasm) = &context.mach_compile_result.as_ref().unwrap().disasm { + if let Some(disasm) = &context.compiled_code().unwrap().disasm { crate::pretty_clif::write_ir_file( &cx.output_filenames, &format!("{}.vcode", codegened_func.symbol_name.name), diff --git a/src/debuginfo/line_info.rs b/src/debuginfo/line_info.rs index ff6a21eef0d..3ad0c420eaf 100644 --- a/src/debuginfo/line_info.rs +++ b/src/debuginfo/line_info.rs @@ -161,7 +161,7 @@ impl FunctionDebugContext { let mut func_end = 0; - let mcr = context.mach_compile_result.as_ref().unwrap(); + let mcr = context.compiled_code().unwrap(); for &MachSrcLoc { start, end, loc } in mcr.buffer.get_srclocs_sorted() { debug_context.dwarf.unit.line_program.row().address_offset = u64::from(start); if !loc.is_default() { diff --git a/src/inline_asm.rs b/src/inline_asm.rs index 9221abb8225..8b3d475cb18 100644 --- a/src/inline_asm.rs +++ b/src/inline_asm.rs @@ -733,7 +733,7 @@ fn call_inline_asm<'tcx>( inputs: Vec<(Size, Value)>, outputs: Vec<(Size, CPlace<'tcx>)>, ) { - let stack_slot = fx.bcx.func.create_stack_slot(StackSlotData { + let stack_slot = fx.bcx.func.create_sized_stack_slot(StackSlotData { kind: StackSlotKind::ExplicitSlot, size: u32::try_from(slot_size.bytes()).unwrap(), }); diff --git a/src/value_and_place.rs b/src/value_and_place.rs index 9e945d83621..2ee98546c99 100644 --- a/src/value_and_place.rs +++ b/src/value_and_place.rs @@ -330,7 +330,7 @@ impl<'tcx> CPlace<'tcx> { .fatal(&format!("values of type {} are too big to store on the stack", layout.ty)); } - let stack_slot = fx.bcx.create_stack_slot(StackSlotData { + let stack_slot = fx.bcx.create_sized_stack_slot(StackSlotData { kind: StackSlotKind::ExplicitSlot, // FIXME Don't force the size to a multiple of 16 bytes once Cranelift gets a way to // specify stack slot alignment. @@ -472,7 +472,7 @@ impl<'tcx> CPlace<'tcx> { } _ if src_ty.is_vector() || dst_ty.is_vector() => { // FIXME do something more efficient for transmutes between vectors and integers. - let stack_slot = fx.bcx.create_stack_slot(StackSlotData { + let stack_slot = fx.bcx.create_sized_stack_slot(StackSlotData { kind: StackSlotKind::ExplicitSlot, // FIXME Don't force the size to a multiple of 16 bytes once Cranelift gets a way to // specify stack slot alignment. -- cgit 1.4.1-3-g733a5