From 298ec5258f8e5f1211734bcb43c89aa184d3ca1b Mon Sep 17 00:00:00 2001
From: Wesley Wiser <wesleywiser@microsoft.com>
Date: Wed, 23 Aug 2023 13:31:38 -0400
Subject: Disable MIR SROA optimization by default

Turn off the MIR SROA optimization by default to prevent incorrect
debuginfo generation and rustc ICEs caused by invalid LLVM IR being
created.

Related to #115113
---
 .../simple_option_map.ezmap.PreCodegen.after.mir       | 18 ++++++++++++++----
 1 file changed, 14 insertions(+), 4 deletions(-)

(limited to 'tests/mir-opt/pre-codegen/simple_option_map.ezmap.PreCodegen.after.mir')

diff --git a/tests/mir-opt/pre-codegen/simple_option_map.ezmap.PreCodegen.after.mir b/tests/mir-opt/pre-codegen/simple_option_map.ezmap.PreCodegen.after.mir
index 68d78f74328..df45b158989 100644
--- a/tests/mir-opt/pre-codegen/simple_option_map.ezmap.PreCodegen.after.mir
+++ b/tests/mir-opt/pre-codegen/simple_option_map.ezmap.PreCodegen.after.mir
@@ -3,21 +3,24 @@
 fn ezmap(_1: Option<i32>) -> Option<i32> {
     debug x => _1;
     let mut _0: std::option::Option<i32>;
+    let mut _5: i32;
     scope 1 (inlined map::<i32, i32, [closure@$DIR/simple_option_map.rs:18:12: 18:15]>) {
         debug slf => _1;
         debug f => const ZeroSized: [closure@$DIR/simple_option_map.rs:18:12: 18:15];
         let mut _2: isize;
         let _3: i32;
-        let mut _4: i32;
+        let mut _4: (i32,);
+        let mut _6: i32;
         scope 2 {
             debug x => _3;
             scope 3 (inlined ezmap::{closure#0}) {
-                debug n => _3;
+                debug n => _5;
             }
         }
     }
 
     bb0: {
+        StorageLive(_3);
         _2 = discriminant(_1);
         switchInt(move _2) -> [0: bb1, 1: bb2, otherwise: bb4];
     }
@@ -29,14 +32,21 @@ fn ezmap(_1: Option<i32>) -> Option<i32> {
 
     bb2: {
         _3 = ((_1 as Some).0: i32);
+        StorageLive(_6);
         StorageLive(_4);
-        _4 = Add(_3, const 1_i32);
-        _0 = Option::<i32>::Some(move _4);
+        _4 = (move _3,);
+        StorageLive(_5);
+        _5 = move (_4.0: i32);
+        _6 = Add(_5, const 1_i32);
+        StorageDead(_5);
         StorageDead(_4);
+        _0 = Option::<i32>::Some(move _6);
+        StorageDead(_6);
         goto -> bb3;
     }
 
     bb3: {
+        StorageDead(_3);
         return;
     }
 
-- 
cgit 1.4.1-3-g733a5