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authorAmanieu d'Antras <amanieu@gmail.com>2020-08-21 18:42:06 +0100
committerAmanieu d'Antras <amanieu@gmail.com>2020-08-21 18:42:06 +0100
commit60b7c2aaefebe2ea6819414ebaf6e374031fc76d (patch)
treeceeee2f464d5417b5397d09ef24f59352369a61b
parent521db88cd9f55ffaeda43df8c10387f74396fe67 (diff)
downloadrust-60b7c2aaefebe2ea6819414ebaf6e374031fc76d.tar.gz
rust-60b7c2aaefebe2ea6819414ebaf6e374031fc76d.zip
More inline asm register name fixups for LLVM
Fixes #75761
-rw-r--r--src/librustc_codegen_llvm/asm.rs7
1 files changed, 5 insertions, 2 deletions
diff --git a/src/librustc_codegen_llvm/asm.rs b/src/librustc_codegen_llvm/asm.rs
index a6062de6bf8..4fef94dde5f 100644
--- a/src/librustc_codegen_llvm/asm.rs
+++ b/src/librustc_codegen_llvm/asm.rs
@@ -479,10 +479,13 @@ fn reg_to_llvm(reg: InlineAsmRegOrRegClass, layout: Option<&TyAndLayout<'tcx>>)
                         _ => unreachable!(),
                     }
                 } else {
-                    // We use i32 as the type for discarded outputs
-                    's'
+                    // We use i64x2 as the type for discarded outputs
+                    'q'
                 };
                 format!("{{{}{}}}", class, idx)
+            } else if reg == InlineAsmReg::AArch64(AArch64InlineAsmReg::x30) {
+                // LLVM doesn't recognize x30
+                "lr".to_string()
             } else {
                 format!("{{{}}}", reg.name())
             }