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| author | Lzu Tao <taolzu@gmail.com> | 2020-10-01 04:09:59 +0000 |
|---|---|---|
| committer | Lzu Tao <taolzu@gmail.com> | 2020-10-04 03:35:52 +0000 |
| commit | 6cb062dacfed8e647361bc94694c7177beb17390 (patch) | |
| tree | 11fec1779e8808e3c453dd56f9df6a85a3e33e75 | |
| parent | 446f86e370884df01cbbacc584d67859c6c2a10b (diff) | |
| download | rust-6cb062dacfed8e647361bc94694c7177beb17390.tar.gz rust-6cb062dacfed8e647361bc94694c7177beb17390.zip | |
mips32: Add f64 hard-float support
co-authored-by: Amanieu <amanieu@gmail.com>
| -rw-r--r-- | compiler/rustc_target/src/asm/mips.rs | 2 | ||||
| -rw-r--r-- | src/doc/unstable-book/src/library-features/asm.md | 2 | ||||
| -rw-r--r-- | src/test/assembly/asm/mips-types.rs | 24 |
3 files changed, 26 insertions, 2 deletions
diff --git a/compiler/rustc_target/src/asm/mips.rs b/compiler/rustc_target/src/asm/mips.rs index 638c52d97f1..f6e3b7d1921 100644 --- a/compiler/rustc_target/src/asm/mips.rs +++ b/compiler/rustc_target/src/asm/mips.rs @@ -36,7 +36,7 @@ impl MipsInlineAsmRegClass { ) -> &'static [(InlineAsmType, Option<&'static str>)] { match self { Self::reg => types! { _: I8, I16, I32, F32; }, - Self::freg => types! { _: F32; }, + Self::freg => types! { _: F32, F64; }, } } } diff --git a/src/doc/unstable-book/src/library-features/asm.md b/src/doc/unstable-book/src/library-features/asm.md index af39424ec6c..8df08b2ab8f 100644 --- a/src/doc/unstable-book/src/library-features/asm.md +++ b/src/doc/unstable-book/src/library-features/asm.md @@ -551,7 +551,7 @@ Each register class has constraints on which value types they can be used with. | ARM | `dreg` | `vfp2` | `i64`, `f64`, `i8x8`, `i16x4`, `i32x2`, `i64x1`, `f32x2` | | ARM | `qreg` | `neon` | `i8x16`, `i16x8`, `i32x4`, `i64x2`, `f32x4` | | MIPS32 | `reg` | None | `i8`, `i16`, `i32`, `f32` | -| MIPS32 | `freg` | None | `f32` | +| MIPS32 | `freg` | None | `f32`, `f64` | | NVPTX | `reg16` | None | `i8`, `i16` | | NVPTX | `reg32` | None | `i8`, `i16`, `i32`, `f32` | | NVPTX | `reg64` | None | `i8`, `i16`, `i32`, `f32`, `i64`, `f64` | diff --git a/src/test/assembly/asm/mips-types.rs b/src/test/assembly/asm/mips-types.rs index e389e064bcb..f37da849064 100644 --- a/src/test/assembly/asm/mips-types.rs +++ b/src/test/assembly/asm/mips-types.rs @@ -108,6 +108,30 @@ pub unsafe fn f0_f32(x: f32) -> f32 { y } +// CHECK-LABEL: reg_f64: +// CHECK: #APP +// CHECK: mov.d $f{{[0-9]+}}, $f{{[0-9]+}} +// CHECK: #NO_APP +#[no_mangle] +pub unsafe fn reg_f64(x: f64) -> f64 { + dont_merge("reg_f64"); + let y; + asm!("mov.d {}, {}", out(freg) y, in(freg) x); + y +} + +// CHECK-LABEL: f0_f64: +// CHECK: #APP +// CHECK: mov.d $f0, $f0 +// CHECK: #NO_APP +#[no_mangle] +pub unsafe fn f0_f64(x: f64) -> f64 { + dont_merge("f0_f64"); + let y; + asm!("mov.d $f0, $f0", lateout("$f0") y, in("$f0") x); + y +} + // CHECK-LABEL: reg_ptr: // CHECK: #APP // CHECK: move ${{[0-9]+}}, ${{[0-9]+}} |