diff options
| author | kennytm <kennytm@gmail.com> | 2018-03-16 01:49:47 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2018-03-16 01:49:47 +0800 |
| commit | bf270bb66ac392e0a1a220583e5e61c8a9d8b4a3 (patch) | |
| tree | b3a082ac17ee4f3703f09c3a4c6b0d6b6d8317fe | |
| parent | 97b489ef39bb775bbe5b99557ef11e5d954c0446 (diff) | |
| parent | 0511077ef2fe9c2803c1a8a25b265792deb56710 (diff) | |
| download | rust-bf270bb66ac392e0a1a220583e5e61c8a9d8b4a3.tar.gz rust-bf270bb66ac392e0a1a220583e5e61c8a9d8b4a3.zip | |
Rollup merge of #48965 - alexcrichton:add-sha-feature, r=eddyb
rustc: Add `sha` to the x86 feature whitelist This'll help us bind the [`SHA` intrinsics][intr] in stdsimd! [intr]: https://software.intel.com/sites/landingpage/IntrinsicsGuide/#othertechs=SHA
| -rw-r--r-- | src/librustc_trans/llvm_util.rs | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/librustc_trans/llvm_util.rs b/src/librustc_trans/llvm_util.rs index afe32f3f669..dd8b44c96b9 100644 --- a/src/librustc_trans/llvm_util.rs +++ b/src/librustc_trans/llvm_util.rs @@ -92,6 +92,7 @@ const X86_WHITELIST: &'static [&'static str] = &["aes", "avx", "avx2", "avx512bw "bmi1", "bmi2", "fma", "fxsr", "lzcnt", "mmx", "pclmulqdq", "popcnt", "rdrand", "rdseed", + "sha", "sse", "sse2", "sse3", "sse4.1", "sse4.2", "sse4a", "ssse3", "tbm", "xsave", "xsavec", |