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| author | William Throwe <wtt6@cornell.edu> | 2015-07-15 08:09:04 -0400 |
|---|---|---|
| committer | William Throwe <wtt6@cornell.edu> | 2015-07-15 08:09:04 -0400 |
| commit | fd1b0305a3bbf53929cc67f52dae166dcd0cc075 (patch) | |
| tree | 2113ee24d90c1d129a521062456311917f3035d6 | |
| parent | e4e93196e16030ebf7a20c473849534235d676f8 (diff) | |
| download | rust-fd1b0305a3bbf53929cc67f52dae166dcd0cc075.tar.gz rust-fd1b0305a3bbf53929cc67f52dae166dcd0cc075.zip | |
Make AtomicPtr Send
This appears to have just been an oversight, and it is annoying to not be able to use an Arc<AtomicPtr>.
| -rw-r--r-- | src/libcore/atomic.rs | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/libcore/atomic.rs b/src/libcore/atomic.rs index a77df096643..e8d5d83be0f 100644 --- a/src/libcore/atomic.rs +++ b/src/libcore/atomic.rs @@ -72,7 +72,7 @@ use self::Ordering::*; -use marker::Sync; +use marker::{Send, Sync}; use intrinsics; use cell::UnsafeCell; @@ -133,6 +133,7 @@ impl<T> Default for AtomicPtr<T> { } } +unsafe impl<T> Send for AtomicPtr<T> {} unsafe impl<T> Sync for AtomicPtr<T> {} /// Atomic memory orderings |