Add intrinsics not bound to a specific arch

1 files changed, 811 insertions, 811 deletions

diff --git a/src/intrinsic/archs.rs b/src/intrinsic/archs.rs
index 0376e0afef9..ef8a54f3530 100644
--- a/src/intrinsic/archs.rs
+++ b/src/intrinsic/archs.rs
@@ -1,140 +1,58 @@
 match name {
-    // ppc
-    "llvm.ppc.altivec.dss" => "__builtin_altivec_dss",
-    "llvm.ppc.altivec.dssall" => "__builtin_altivec_dssall",
-    "llvm.ppc.altivec.dst" => "__builtin_altivec_dst",
-    "llvm.ppc.altivec.dstst" => "__builtin_altivec_dstst",
-    "llvm.ppc.altivec.dststt" => "__builtin_altivec_dststt",
-    "llvm.ppc.altivec.dstt" => "__builtin_altivec_dstt",
-    "llvm.ppc.altivec.mfvscr" => "__builtin_altivec_mfvscr",
-    "llvm.ppc.altivec.mtvscr" => "__builtin_altivec_mtvscr",
-    "llvm.ppc.altivec.vaddcuw" => "__builtin_altivec_vaddcuw",
-    "llvm.ppc.altivec.vaddsbs" => "__builtin_altivec_vaddsbs",
-    "llvm.ppc.altivec.vaddshs" => "__builtin_altivec_vaddshs",
-    "llvm.ppc.altivec.vaddsws" => "__builtin_altivec_vaddsws",
-    "llvm.ppc.altivec.vaddubs" => "__builtin_altivec_vaddubs",
-    "llvm.ppc.altivec.vadduhs" => "__builtin_altivec_vadduhs",
-    "llvm.ppc.altivec.vadduws" => "__builtin_altivec_vadduws",
-    "llvm.ppc.altivec.vavgsb" => "__builtin_altivec_vavgsb",
-    "llvm.ppc.altivec.vavgsh" => "__builtin_altivec_vavgsh",
-    "llvm.ppc.altivec.vavgsw" => "__builtin_altivec_vavgsw",
-    "llvm.ppc.altivec.vavgub" => "__builtin_altivec_vavgub",
-    "llvm.ppc.altivec.vavguh" => "__builtin_altivec_vavguh",
-    "llvm.ppc.altivec.vavguw" => "__builtin_altivec_vavguw",
-    "llvm.ppc.altivec.vcfsx" => "__builtin_altivec_vcfsx",
-    "llvm.ppc.altivec.vcfux" => "__builtin_altivec_vcfux",
-    "llvm.ppc.altivec.vcmpbfp" => "__builtin_altivec_vcmpbfp",
-    "llvm.ppc.altivec.vcmpbfp.p" => "__builtin_altivec_vcmpbfp_p",
-    "llvm.ppc.altivec.vcmpeqfp" => "__builtin_altivec_vcmpeqfp",
-    "llvm.ppc.altivec.vcmpeqfp.p" => "__builtin_altivec_vcmpeqfp_p",
-    "llvm.ppc.altivec.vcmpequb" => "__builtin_altivec_vcmpequb",
-    "llvm.ppc.altivec.vcmpequb.p" => "__builtin_altivec_vcmpequb_p",
-    "llvm.ppc.altivec.vcmpequh" => "__builtin_altivec_vcmpequh",
-    "llvm.ppc.altivec.vcmpequh.p" => "__builtin_altivec_vcmpequh_p",
-    "llvm.ppc.altivec.vcmpequw" => "__builtin_altivec_vcmpequw",
-    "llvm.ppc.altivec.vcmpequw.p" => "__builtin_altivec_vcmpequw_p",
-    "llvm.ppc.altivec.vcmpgefp" => "__builtin_altivec_vcmpgefp",
-    "llvm.ppc.altivec.vcmpgefp.p" => "__builtin_altivec_vcmpgefp_p",
-    "llvm.ppc.altivec.vcmpgtfp" => "__builtin_altivec_vcmpgtfp",
-    "llvm.ppc.altivec.vcmpgtfp.p" => "__builtin_altivec_vcmpgtfp_p",
-    "llvm.ppc.altivec.vcmpgtsb" => "__builtin_altivec_vcmpgtsb",
-    "llvm.ppc.altivec.vcmpgtsb.p" => "__builtin_altivec_vcmpgtsb_p",
-    "llvm.ppc.altivec.vcmpgtsh" => "__builtin_altivec_vcmpgtsh",
-    "llvm.ppc.altivec.vcmpgtsh.p" => "__builtin_altivec_vcmpgtsh_p",
-    "llvm.ppc.altivec.vcmpgtsw" => "__builtin_altivec_vcmpgtsw",
-    "llvm.ppc.altivec.vcmpgtsw.p" => "__builtin_altivec_vcmpgtsw_p",
-    "llvm.ppc.altivec.vcmpgtub" => "__builtin_altivec_vcmpgtub",
-    "llvm.ppc.altivec.vcmpgtub.p" => "__builtin_altivec_vcmpgtub_p",
-    "llvm.ppc.altivec.vcmpgtuh" => "__builtin_altivec_vcmpgtuh",
-    "llvm.ppc.altivec.vcmpgtuh.p" => "__builtin_altivec_vcmpgtuh_p",
-    "llvm.ppc.altivec.vcmpgtuw" => "__builtin_altivec_vcmpgtuw",
-    "llvm.ppc.altivec.vcmpgtuw.p" => "__builtin_altivec_vcmpgtuw_p",
-    "llvm.ppc.altivec.vctsxs" => "__builtin_altivec_vctsxs",
-    "llvm.ppc.altivec.vctuxs" => "__builtin_altivec_vctuxs",
-    "llvm.ppc.altivec.vexptefp" => "__builtin_altivec_vexptefp",
-    "llvm.ppc.altivec.vlogefp" => "__builtin_altivec_vlogefp",
-    "llvm.ppc.altivec.vmaddfp" => "__builtin_altivec_vmaddfp",
-    "llvm.ppc.altivec.vmaxfp" => "__builtin_altivec_vmaxfp",
-    "llvm.ppc.altivec.vmaxsb" => "__builtin_altivec_vmaxsb",
-    "llvm.ppc.altivec.vmaxsh" => "__builtin_altivec_vmaxsh",
-    "llvm.ppc.altivec.vmaxsw" => "__builtin_altivec_vmaxsw",
-    "llvm.ppc.altivec.vmaxub" => "__builtin_altivec_vmaxub",
-    "llvm.ppc.altivec.vmaxuh" => "__builtin_altivec_vmaxuh",
-    "llvm.ppc.altivec.vmaxuw" => "__builtin_altivec_vmaxuw",
-    "llvm.ppc.altivec.vmhaddshs" => "__builtin_altivec_vmhaddshs",
-    "llvm.ppc.altivec.vmhraddshs" => "__builtin_altivec_vmhraddshs",
-    "llvm.ppc.altivec.vminfp" => "__builtin_altivec_vminfp",
-    "llvm.ppc.altivec.vminsb" => "__builtin_altivec_vminsb",
-    "llvm.ppc.altivec.vminsh" => "__builtin_altivec_vminsh",
-    "llvm.ppc.altivec.vminsw" => "__builtin_altivec_vminsw",
-    "llvm.ppc.altivec.vminub" => "__builtin_altivec_vminub",
-    "llvm.ppc.altivec.vminuh" => "__builtin_altivec_vminuh",
-    "llvm.ppc.altivec.vminuw" => "__builtin_altivec_vminuw",
-    "llvm.ppc.altivec.vmladduhm" => "__builtin_altivec_vmladduhm",
-    "llvm.ppc.altivec.vmsummbm" => "__builtin_altivec_vmsummbm",
-    "llvm.ppc.altivec.vmsumshm" => "__builtin_altivec_vmsumshm",
-    "llvm.ppc.altivec.vmsumshs" => "__builtin_altivec_vmsumshs",
-    "llvm.ppc.altivec.vmsumubm" => "__builtin_altivec_vmsumubm",
-    "llvm.ppc.altivec.vmsumuhm" => "__builtin_altivec_vmsumuhm",
-    "llvm.ppc.altivec.vmsumuhs" => "__builtin_altivec_vmsumuhs",
-    "llvm.ppc.altivec.vmulesb" => "__builtin_altivec_vmulesb",
-    "llvm.ppc.altivec.vmulesh" => "__builtin_altivec_vmulesh",
-    "llvm.ppc.altivec.vmuleub" => "__builtin_altivec_vmuleub",
-    "llvm.ppc.altivec.vmuleuh" => "__builtin_altivec_vmuleuh",
-    "llvm.ppc.altivec.vmulosb" => "__builtin_altivec_vmulosb",
-    "llvm.ppc.altivec.vmulosh" => "__builtin_altivec_vmulosh",
-    "llvm.ppc.altivec.vmuloub" => "__builtin_altivec_vmuloub",
-    "llvm.ppc.altivec.vmulouh" => "__builtin_altivec_vmulouh",
-    "llvm.ppc.altivec.vnmsubfp" => "__builtin_altivec_vnmsubfp",
-    "llvm.ppc.altivec.vperm" => "__builtin_altivec_vperm_4si",
-    "llvm.ppc.altivec.vpkpx" => "__builtin_altivec_vpkpx",
-    "llvm.ppc.altivec.vpkshss" => "__builtin_altivec_vpkshss",
-    "llvm.ppc.altivec.vpkshus" => "__builtin_altivec_vpkshus",
-    "llvm.ppc.altivec.vpkswss" => "__builtin_altivec_vpkswss",
-    "llvm.ppc.altivec.vpkswus" => "__builtin_altivec_vpkswus",
-    "llvm.ppc.altivec.vpkuhus" => "__builtin_altivec_vpkuhus",
-    "llvm.ppc.altivec.vpkuwus" => "__builtin_altivec_vpkuwus",
-    "llvm.ppc.altivec.vrefp" => "__builtin_altivec_vrefp",
-    "llvm.ppc.altivec.vrfim" => "__builtin_altivec_vrfim",
-    "llvm.ppc.altivec.vrfin" => "__builtin_altivec_vrfin",
-    "llvm.ppc.altivec.vrfip" => "__builtin_altivec_vrfip",
-    "llvm.ppc.altivec.vrfiz" => "__builtin_altivec_vrfiz",
-    "llvm.ppc.altivec.vrlb" => "__builtin_altivec_vrlb",
-    "llvm.ppc.altivec.vrlh" => "__builtin_altivec_vrlh",
-    "llvm.ppc.altivec.vrlw" => "__builtin_altivec_vrlw",
-    "llvm.ppc.altivec.vrsqrtefp" => "__builtin_altivec_vrsqrtefp",
-    "llvm.ppc.altivec.vsel" => "__builtin_altivec_vsel_4si",
-    "llvm.ppc.altivec.vsl" => "__builtin_altivec_vsl",
-    "llvm.ppc.altivec.vslb" => "__builtin_altivec_vslb",
-    "llvm.ppc.altivec.vslh" => "__builtin_altivec_vslh",
-    "llvm.ppc.altivec.vslo" => "__builtin_altivec_vslo",
-    "llvm.ppc.altivec.vslw" => "__builtin_altivec_vslw",
-    "llvm.ppc.altivec.vsr" => "__builtin_altivec_vsr",
-    "llvm.ppc.altivec.vsrab" => "__builtin_altivec_vsrab",
-    "llvm.ppc.altivec.vsrah" => "__builtin_altivec_vsrah",
-    "llvm.ppc.altivec.vsraw" => "__builtin_altivec_vsraw",
-    "llvm.ppc.altivec.vsrb" => "__builtin_altivec_vsrb",
-    "llvm.ppc.altivec.vsrh" => "__builtin_altivec_vsrh",
-    "llvm.ppc.altivec.vsro" => "__builtin_altivec_vsro",
-    "llvm.ppc.altivec.vsrw" => "__builtin_altivec_vsrw",
-    "llvm.ppc.altivec.vsubcuw" => "__builtin_altivec_vsubcuw",
-    "llvm.ppc.altivec.vsubsbs" => "__builtin_altivec_vsubsbs",
-    "llvm.ppc.altivec.vsubshs" => "__builtin_altivec_vsubshs",
-    "llvm.ppc.altivec.vsubsws" => "__builtin_altivec_vsubsws",
-    "llvm.ppc.altivec.vsububs" => "__builtin_altivec_vsububs",
-    "llvm.ppc.altivec.vsubuhs" => "__builtin_altivec_vsubuhs",
-    "llvm.ppc.altivec.vsubuws" => "__builtin_altivec_vsubuws",
-    "llvm.ppc.altivec.vsum2sws" => "__builtin_altivec_vsum2sws",
-    "llvm.ppc.altivec.vsum4sbs" => "__builtin_altivec_vsum4sbs",
-    "llvm.ppc.altivec.vsum4shs" => "__builtin_altivec_vsum4shs",
-    "llvm.ppc.altivec.vsum4ubs" => "__builtin_altivec_vsum4ubs",
-    "llvm.ppc.altivec.vsumsws" => "__builtin_altivec_vsumsws",
-    "llvm.ppc.altivec.vupkhpx" => "__builtin_altivec_vupkhpx",
-    "llvm.ppc.altivec.vupkhsb" => "__builtin_altivec_vupkhsb",
-    "llvm.ppc.altivec.vupkhsh" => "__builtin_altivec_vupkhsh",
-    "llvm.ppc.altivec.vupklpx" => "__builtin_altivec_vupklpx",
-    "llvm.ppc.altivec.vupklsb" => "__builtin_altivec_vupklsb",
-    "llvm.ppc.altivec.vupklsh" => "__builtin_altivec_vupklsh",
+    // AMDGPU
+    "llvm.AMDGPU.div.fixup.f32" => "__builtin_amdgpu_div_fixup",
+    "llvm.AMDGPU.div.fixup.f64" => "__builtin_amdgpu_div_fixup",
+    "llvm.AMDGPU.div.fixup.v2f64" => "__builtin_amdgpu_div_fixup",
+    "llvm.AMDGPU.div.fixup.v4f32" => "__builtin_amdgpu_div_fixup",
+    "llvm.AMDGPU.div.fmas.f32" => "__builtin_amdgpu_div_fmas",
+    "llvm.AMDGPU.div.fmas.f64" => "__builtin_amdgpu_div_fmas",
+    "llvm.AMDGPU.div.fmas.v2f64" => "__builtin_amdgpu_div_fmas",
+    "llvm.AMDGPU.div.fmas.v4f32" => "__builtin_amdgpu_div_fmas",
+    "llvm.AMDGPU.ldexp.f32" => "__builtin_amdgpu_ldexp",
+    "llvm.AMDGPU.ldexp.f64" => "__builtin_amdgpu_ldexp",
+    "llvm.AMDGPU.ldexp.v2f64" => "__builtin_amdgpu_ldexp",
+    "llvm.AMDGPU.ldexp.v4f32" => "__builtin_amdgpu_ldexp",
+    "llvm.AMDGPU.rcp.f32" => "__builtin_amdgpu_rcp",
+    "llvm.AMDGPU.rcp.f64" => "__builtin_amdgpu_rcp",
+    "llvm.AMDGPU.rcp.v2f64" => "__builtin_amdgpu_rcp",
+    "llvm.AMDGPU.rcp.v4f32" => "__builtin_amdgpu_rcp",
+    "llvm.AMDGPU.rsq.clamped.f32" => "__builtin_amdgpu_rsq_clamped",
+    "llvm.AMDGPU.rsq.clamped.f64" => "__builtin_amdgpu_rsq_clamped",
+    "llvm.AMDGPU.rsq.clamped.v2f64" => "__builtin_amdgpu_rsq_clamped",
+    "llvm.AMDGPU.rsq.clamped.v4f32" => "__builtin_amdgpu_rsq_clamped",
+    "llvm.AMDGPU.rsq.f32" => "__builtin_amdgpu_rsq",
+    "llvm.AMDGPU.rsq.f64" => "__builtin_amdgpu_rsq",
+    "llvm.AMDGPU.rsq.v2f64" => "__builtin_amdgpu_rsq",
+    "llvm.AMDGPU.rsq.v4f32" => "__builtin_amdgpu_rsq",
+    "llvm.AMDGPU.trig.preop.f32" => "__builtin_amdgpu_trig_preop",
+    "llvm.AMDGPU.trig.preop.f64" => "__builtin_amdgpu_trig_preop",
+    "llvm.AMDGPU.trig.preop.v2f64" => "__builtin_amdgpu_trig_preop",
+    "llvm.AMDGPU.trig.preop.v4f32" => "__builtin_amdgpu_trig_preop",
+    // aarch64
+    "llvm.aarch64.dmb" => "__builtin_arm_dmb",
+    "llvm.aarch64.dsb" => "__builtin_arm_dsb",
+    "llvm.aarch64.isb" => "__builtin_arm_isb",
+    // arm
+    "llvm.arm.cdp" => "__builtin_arm_cdp",
+    "llvm.arm.cdp2" => "__builtin_arm_cdp2",
+    "llvm.arm.dmb" => "__builtin_arm_dmb",
+    "llvm.arm.dsb" => "__builtin_arm_dsb",
+    "llvm.arm.get.fpscr" => "__builtin_arm_get_fpscr",
+    "llvm.arm.isb" => "__builtin_arm_isb",
+    "llvm.arm.mcr" => "__builtin_arm_mcr",
+    "llvm.arm.mcr2" => "__builtin_arm_mcr2",
+    "llvm.arm.mcrr" => "__builtin_arm_mcrr",
+    "llvm.arm.mcrr2" => "__builtin_arm_mcrr2",
+    "llvm.arm.mrc" => "__builtin_arm_mrc",
+    "llvm.arm.mrc2" => "__builtin_arm_mrc2",
+    "llvm.arm.qadd" => "__builtin_arm_qadd",
+    "llvm.arm.qsub" => "__builtin_arm_qsub",
+    "llvm.arm.set.fpscr" => "__builtin_arm_set_fpscr",
+    "llvm.arm.ssat" => "__builtin_arm_ssat",
+    "llvm.arm.thread.pointer" => "__builtin_thread_pointer",
+    "llvm.arm.usat" => "__builtin_arm_usat",
+    // cuda
+    "llvm.cuda.syncthreads" => "__syncthreads",
     // hexagon
     "llvm.hexagon.A2.abs" => "__builtin_HEXAGON_A2_abs",
     "llvm.hexagon.A2.absp" => "__builtin_HEXAGON_A2_absp",
@@ -989,10 +907,607 @@ match name {
     "llvm.hexagon.S5.vasrhrnd.goodsyntax" => "__builtin_HEXAGON_S5_vasrhrnd_goodsyntax",
     "llvm.hexagon.SI.to.SXTHI.asrh" => "__builtin_SI_to_SXTHI_asrh",
     "llvm.hexagon.circ.ldd" => "__builtin_circ_ldd",
-    // aarch64
-    "llvm.aarch64.dmb" => "__builtin_arm_dmb",
-    "llvm.aarch64.dsb" => "__builtin_arm_dsb",
-    "llvm.aarch64.isb" => "__builtin_arm_isb",
+    // mips
+    "llvm.mips.add.a.b" => "__builtin_msa_add_a_b",
+    "llvm.mips.add.a.d" => "__builtin_msa_add_a_d",
+    "llvm.mips.add.a.h" => "__builtin_msa_add_a_h",
+    "llvm.mips.add.a.w" => "__builtin_msa_add_a_w",
+    "llvm.mips.adds.a.b" => "__builtin_msa_adds_a_b",
+    "llvm.mips.adds.a.d" => "__builtin_msa_adds_a_d",
+    "llvm.mips.adds.a.h" => "__builtin_msa_adds_a_h",
+    "llvm.mips.adds.a.w" => "__builtin_msa_adds_a_w",
+    "llvm.mips.adds.s.b" => "__builtin_msa_adds_s_b",
+    "llvm.mips.adds.s.d" => "__builtin_msa_adds_s_d",
+    "llvm.mips.adds.s.h" => "__builtin_msa_adds_s_h",
+    "llvm.mips.adds.s.w" => "__builtin_msa_adds_s_w",
+    "llvm.mips.adds.u.b" => "__builtin_msa_adds_u_b",
+    "llvm.mips.adds.u.d" => "__builtin_msa_adds_u_d",
+    "llvm.mips.adds.u.h" => "__builtin_msa_adds_u_h",
+    "llvm.mips.adds.u.w" => "__builtin_msa_adds_u_w",
+    "llvm.mips.addsc" => "__builtin_mips_addsc",
+    "llvm.mips.addu.ph" => "__builtin_mips_addu_ph",
+    "llvm.mips.addu.qb" => "__builtin_mips_addu_qb",
+    "llvm.mips.addu.s.ph" => "__builtin_mips_addu_s_ph",
+    "llvm.mips.addu.s.qb" => "__builtin_mips_addu_s_qb",
+    "llvm.mips.adduh.qb" => "__builtin_mips_adduh_qb",
+    "llvm.mips.adduh.r.qb" => "__builtin_mips_adduh_r_qb",
+    "llvm.mips.addv.b" => "__builtin_msa_addv_b",
+    "llvm.mips.addv.d" => "__builtin_msa_addv_d",
+    "llvm.mips.addv.h" => "__builtin_msa_addv_h",
+    "llvm.mips.addv.w" => "__builtin_msa_addv_w",
+    "llvm.mips.addvi.b" => "__builtin_msa_addvi_b",
+    "llvm.mips.addvi.d" => "__builtin_msa_addvi_d",
+    "llvm.mips.addvi.h" => "__builtin_msa_addvi_h",
+    "llvm.mips.addvi.w" => "__builtin_msa_addvi_w",
+    "llvm.mips.addwc" => "__builtin_mips_addwc",
+    "llvm.mips.and.v" => "__builtin_msa_and_v",
+    "llvm.mips.andi.b" => "__builtin_msa_andi_b",
+    "llvm.mips.append" => "__builtin_mips_append",
+    "llvm.mips.asub.s.b" => "__builtin_msa_asub_s_b",
+    "llvm.mips.asub.s.d" => "__builtin_msa_asub_s_d",
+    "llvm.mips.asub.s.h" => "__builtin_msa_asub_s_h",
+    "llvm.mips.asub.s.w" => "__builtin_msa_asub_s_w",
+    "llvm.mips.asub.u.b" => "__builtin_msa_asub_u_b",
+    "llvm.mips.asub.u.d" => "__builtin_msa_asub_u_d",
+    "llvm.mips.asub.u.h" => "__builtin_msa_asub_u_h",
+    "llvm.mips.asub.u.w" => "__builtin_msa_asub_u_w",
+    "llvm.mips.ave.s.b" => "__builtin_msa_ave_s_b",
+    "llvm.mips.ave.s.d" => "__builtin_msa_ave_s_d",
+    "llvm.mips.ave.s.h" => "__builtin_msa_ave_s_h",
+    "llvm.mips.ave.s.w" => "__builtin_msa_ave_s_w",
+    "llvm.mips.ave.u.b" => "__builtin_msa_ave_u_b",
+    "llvm.mips.ave.u.d" => "__builtin_msa_ave_u_d",
+    "llvm.mips.ave.u.h" => "__builtin_msa_ave_u_h",
+    "llvm.mips.ave.u.w" => "__builtin_msa_ave_u_w",
+    "llvm.mips.aver.s.b" => "__builtin_msa_aver_s_b",
+    "llvm.mips.aver.s.d" => "__builtin_msa_aver_s_d",
+    "llvm.mips.aver.s.h" => "__builtin_msa_aver_s_h",
+    "llvm.mips.aver.s.w" => "__builtin_msa_aver_s_w",
+    "llvm.mips.aver.u.b" => "__builtin_msa_aver_u_b",
+    "llvm.mips.aver.u.d" => "__builtin_msa_aver_u_d",
+    "llvm.mips.aver.u.h" => "__builtin_msa_aver_u_h",
+    "llvm.mips.aver.u.w" => "__builtin_msa_aver_u_w",
+    "llvm.mips.balign" => "__builtin_mips_balign",
+    "llvm.mips.bclr.b" => "__builtin_msa_bclr_b",
+    "llvm.mips.bclr.d" => "__builtin_msa_bclr_d",
+    "llvm.mips.bclr.h" => "__builtin_msa_bclr_h",
+    "llvm.mips.bclr.w" => "__builtin_msa_bclr_w",
+    "llvm.mips.bclri.b" => "__builtin_msa_bclri_b",
+    "llvm.mips.bclri.d" => "__builtin_msa_bclri_d",
+    "llvm.mips.bclri.h" => "__builtin_msa_bclri_h",
+    "llvm.mips.bclri.w" => "__builtin_msa_bclri_w",
+    "llvm.mips.binsl.b" => "__builtin_msa_binsl_b",
+    "llvm.mips.binsl.d" => "__builtin_msa_binsl_d",
+    "llvm.mips.binsl.h" => "__builtin_msa_binsl_h",
+    "llvm.mips.binsl.w" => "__builtin_msa_binsl_w",
+    "llvm.mips.binsli.b" => "__builtin_msa_binsli_b",
+    "llvm.mips.binsli.d" => "__builtin_msa_binsli_d",
+    "llvm.mips.binsli.h" => "__builtin_msa_binsli_h",
+    "llvm.mips.binsli.w" => "__builtin_msa_binsli_w",
+    "llvm.mips.binsr.b" => "__builtin_msa_binsr_b",
+    "llvm.mips.binsr.d" => "__builtin_msa_binsr_d",
+    "llvm.mips.binsr.h" => "__builtin_msa_binsr_h",
+    "llvm.mips.binsr.w" => "__builtin_msa_binsr_w",
+    "llvm.mips.binsri.b" => "__builtin_msa_binsri_b",
+    "llvm.mips.binsri.d" => "__builtin_msa_binsri_d",
+    "llvm.mips.binsri.h" => "__builtin_msa_binsri_h",
+    "llvm.mips.binsri.w" => "__builtin_msa_binsri_w",
+    "llvm.mips.bitrev" => "__builtin_mips_bitrev",
+    "llvm.mips.bmnz.v" => "__builtin_msa_bmnz_v",
+    "llvm.mips.bmnzi.b" => "__builtin_msa_bmnzi_b",
+    "llvm.mips.bmz.v" => "__builtin_msa_bmz_v",
+    "llvm.mips.bmzi.b" => "__builtin_msa_bmzi_b",
+    "llvm.mips.bneg.b" => "__builtin_msa_bneg_b",
+    "llvm.mips.bneg.d" => "__builtin_msa_bneg_d",
+    "llvm.mips.bneg.h" => "__builtin_msa_bneg_h",
+    "llvm.mips.bneg.w" => "__builtin_msa_bneg_w",
+    "llvm.mips.bnegi.b" => "__builtin_msa_bnegi_b",
+    "llvm.mips.bnegi.d" => "__builtin_msa_bnegi_d",
+    "llvm.mips.bnegi.h" => "__builtin_msa_bnegi_h",
+    "llvm.mips.bnegi.w" => "__builtin_msa_bnegi_w",
+    "llvm.mips.bnz.b" => "__builtin_msa_bnz_b",
+    "llvm.mips.bnz.d" => "__builtin_msa_bnz_d",
+    "llvm.mips.bnz.h" => "__builtin_msa_bnz_h",
+    "llvm.mips.bnz.v" => "__builtin_msa_bnz_v",
+    "llvm.mips.bnz.w" => "__builtin_msa_bnz_w",
+    "llvm.mips.bposge32" => "__builtin_mips_bposge32",
+    "llvm.mips.bsel.v" => "__builtin_msa_bsel_v",
+    "llvm.mips.bseli.b" => "__builtin_msa_bseli_b",
+    "llvm.mips.bset.b" => "__builtin_msa_bset_b",
+    "llvm.mips.bset.d" => "__builtin_msa_bset_d",
+    "llvm.mips.bset.h" => "__builtin_msa_bset_h",
+    "llvm.mips.bset.w" => "__builtin_msa_bset_w",
+    "llvm.mips.bseti.b" => "__builtin_msa_bseti_b",
+    "llvm.mips.bseti.d" => "__builtin_msa_bseti_d",
+    "llvm.mips.bseti.h" => "__builtin_msa_bseti_h",
+    "llvm.mips.bseti.w" => "__builtin_msa_bseti_w",
+    "llvm.mips.bz.b" => "__builtin_msa_bz_b",
+    "llvm.mips.bz.d" => "__builtin_msa_bz_d",
+    "llvm.mips.bz.h" => "__builtin_msa_bz_h",
+    "llvm.mips.bz.v" => "__builtin_msa_bz_v",
+    "llvm.mips.bz.w" => "__builtin_msa_bz_w",
+    "llvm.mips.ceq.b" => "__builtin_msa_ceq_b",
+    "llvm.mips.ceq.d" => "__builtin_msa_ceq_d",
+    "llvm.mips.ceq.h" => "__builtin_msa_ceq_h",
+    "llvm.mips.ceq.w" => "__builtin_msa_ceq_w",
+    "llvm.mips.ceqi.b" => "__builtin_msa_ceqi_b",
+    "llvm.mips.ceqi.d" => "__builtin_msa_ceqi_d",
+    "llvm.mips.ceqi.h" => "__builtin_msa_ceqi_h",
+    "llvm.mips.ceqi.w" => "__builtin_msa_ceqi_w",
+    "llvm.mips.cfcmsa" => "__builtin_msa_cfcmsa",
+    "llvm.mips.cle.s.b" => "__builtin_msa_cle_s_b",
+    "llvm.mips.cle.s.d" => "__builtin_msa_cle_s_d",
+    "llvm.mips.cle.s.h" => "__builtin_msa_cle_s_h",
+    "llvm.mips.cle.s.w" => "__builtin_msa_cle_s_w",
+    "llvm.mips.cle.u.b" => "__builtin_msa_cle_u_b",
+    "llvm.mips.cle.u.d" => "__builtin_msa_cle_u_d",
+    "llvm.mips.cle.u.h" => "__builtin_msa_cle_u_h",
+    "llvm.mips.cle.u.w" => "__builtin_msa_cle_u_w",
+    "llvm.mips.clei.s.b" => "__builtin_msa_clei_s_b",
+    "llvm.mips.clei.s.d" => "__builtin_msa_clei_s_d",
+    "llvm.mips.clei.s.h" => "__builtin_msa_clei_s_h",
+    "llvm.mips.clei.s.w" => "__builtin_msa_clei_s_w",
+    "llvm.mips.clei.u.b" => "__builtin_msa_clei_u_b",
+    "llvm.mips.clei.u.d" => "__builtin_msa_clei_u_d",
+    "llvm.mips.clei.u.h" => "__builtin_msa_clei_u_h",
+    "llvm.mips.clei.u.w" => "__builtin_msa_clei_u_w",
+    "llvm.mips.clt.s.b" => "__builtin_msa_clt_s_b",
+    "llvm.mips.clt.s.d" => "__builtin_msa_clt_s_d",
+    "llvm.mips.clt.s.h" => "__builtin_msa_clt_s_h",
+    "llvm.mips.clt.s.w" => "__builtin_msa_clt_s_w",
+    "llvm.mips.clt.u.b" => "__builtin_msa_clt_u_b",
+    "llvm.mips.clt.u.d" => "__builtin_msa_clt_u_d",
+    "llvm.mips.clt.u.h" => "__builtin_msa_clt_u_h",
+    "llvm.mips.clt.u.w" => "__builtin_msa_clt_u_w",
+    "llvm.mips.clti.s.b" => "__builtin_msa_clti_s_b",
+    "llvm.mips.clti.s.d" => "__builtin_msa_clti_s_d",
+    "llvm.mips.clti.s.h" => "__builtin_msa_clti_s_h",
+    "llvm.mips.clti.s.w" => "__builtin_msa_clti_s_w",
+    "llvm.mips.clti.u.b" => "__builtin_msa_clti_u_b",
+    "llvm.mips.clti.u.d" => "__builtin_msa_clti_u_d",
+    "llvm.mips.clti.u.h" => "__builtin_msa_clti_u_h",
+    "llvm.mips.clti.u.w" => "__builtin_msa_clti_u_w",
+    "llvm.mips.cmpgdu.eq.qb" => "__builtin_mips_cmpgdu_eq_qb",
+    "llvm.mips.cmpgdu.le.qb" => "__builtin_mips_cmpgdu_le_qb",
+    "llvm.mips.cmpgdu.lt.qb" => "__builtin_mips_cmpgdu_lt_qb",
+    "llvm.mips.cmpgu.eq.qb" => "__builtin_mips_cmpgu_eq_qb",
+    "llvm.mips.cmpgu.le.qb" => "__builtin_mips_cmpgu_le_qb",
+    "llvm.mips.cmpgu.lt.qb" => "__builtin_mips_cmpgu_lt_qb",
+    "llvm.mips.cmpu.eq.qb" => "__builtin_mips_cmpu_eq_qb",
+    "llvm.mips.cmpu.le.qb" => "__builtin_mips_cmpu_le_qb",
+    "llvm.mips.cmpu.lt.qb" => "__builtin_mips_cmpu_lt_qb",
+    "llvm.mips.copy.s.b" => "__builtin_msa_copy_s_b",
+    "llvm.mips.copy.s.d" => "__builtin_msa_copy_s_d",
+    "llvm.mips.copy.s.h" => "__builtin_msa_copy_s_h",
+    "llvm.mips.copy.s.w" => "__builtin_msa_copy_s_w",
+    "llvm.mips.copy.u.b" => "__builtin_msa_copy_u_b",
+    "llvm.mips.copy.u.d" => "__builtin_msa_copy_u_d",
+    "llvm.mips.copy.u.h" => "__builtin_msa_copy_u_h",
+    "llvm.mips.copy.u.w" => "__builtin_msa_copy_u_w",
+    "llvm.mips.ctcmsa" => "__builtin_msa_ctcmsa",
+    "llvm.mips.div.s.b" => "__builtin_msa_div_s_b",
+    "llvm.mips.div.s.d" => "__builtin_msa_div_s_d",
+    "llvm.mips.div.s.h" => "__builtin_msa_div_s_h",
+    "llvm.mips.div.s.w" => "__builtin_msa_div_s_w",
+    "llvm.mips.div.u.b" => "__builtin_msa_div_u_b",
+    "llvm.mips.div.u.d" => "__builtin_msa_div_u_d",
+    "llvm.mips.div.u.h" => "__builtin_msa_div_u_h",
+    "llvm.mips.div.u.w" => "__builtin_msa_div_u_w",
+    "llvm.mips.dlsa" => "__builtin_mips_dlsa",
+    "llvm.mips.dotp.s.d" => "__builtin_msa_dotp_s_d",
+    "llvm.mips.dotp.s.h" => "__builtin_msa_dotp_s_h",
+    "llvm.mips.dotp.s.w" => "__builtin_msa_dotp_s_w",
+    "llvm.mips.dotp.u.d" => "__builtin_msa_dotp_u_d",
+    "llvm.mips.dotp.u.h" => "__builtin_msa_dotp_u_h",
+    "llvm.mips.dotp.u.w" => "__builtin_msa_dotp_u_w",
+    "llvm.mips.dpa.w.ph" => "__builtin_mips_dpa_w_ph",
+    "llvm.mips.dpadd.s.d" => "__builtin_msa_dpadd_s_d",
+    "llvm.mips.dpadd.s.h" => "__builtin_msa_dpadd_s_h",
+    "llvm.mips.dpadd.s.w" => "__builtin_msa_dpadd_s_w",
+    "llvm.mips.dpadd.u.d" => "__builtin_msa_dpadd_u_d",
+    "llvm.mips.dpadd.u.h" => "__builtin_msa_dpadd_u_h",
+    "llvm.mips.dpadd.u.w" => "__builtin_msa_dpadd_u_w",
+    "llvm.mips.dpau.h.qbl" => "__builtin_mips_dpau_h_qbl",
+    "llvm.mips.dpau.h.qbr" => "__builtin_mips_dpau_h_qbr",
+    "llvm.mips.dpax.w.ph" => "__builtin_mips_dpax_w_ph",
+    "llvm.mips.dps.w.ph" => "__builtin_mips_dps_w_ph",
+    "llvm.mips.dpsu.h.qbl" => "__builtin_mips_dpsu_h_qbl",
+    "llvm.mips.dpsu.h.qbr" => "__builtin_mips_dpsu_h_qbr",
+    "llvm.mips.dpsub.s.d" => "__builtin_msa_dpsub_s_d",
+    "llvm.mips.dpsub.s.h" => "__builtin_msa_dpsub_s_h",
+    "llvm.mips.dpsub.s.w" => "__builtin_msa_dpsub_s_w",
+    "llvm.mips.dpsub.u.d" => "__builtin_msa_dpsub_u_d",
+    "llvm.mips.dpsub.u.h" => "__builtin_msa_dpsub_u_h",
+    "llvm.mips.dpsub.u.w" => "__builtin_msa_dpsub_u_w",
+    "llvm.mips.dpsx.w.ph" => "__builtin_mips_dpsx_w_ph",
+    "llvm.mips.extp" => "__builtin_mips_extp",
+    "llvm.mips.extpdp" => "__builtin_mips_extpdp",
+    "llvm.mips.extr.r.w" => "__builtin_mips_extr_r_w",
+    "llvm.mips.extr.rs.w" => "__builtin_mips_extr_rs_w",
+    "llvm.mips.extr.s.h" => "__builtin_mips_extr_s_h",
+    "llvm.mips.extr.w" => "__builtin_mips_extr_w",
+    "llvm.mips.fadd.d" => "__builtin_msa_fadd_d",
+    "llvm.mips.fadd.w" => "__builtin_msa_fadd_w",
+    "llvm.mips.fcaf.d" => "__builtin_msa_fcaf_d",
+    "llvm.mips.fcaf.w" => "__builtin_msa_fcaf_w",
+    "llvm.mips.fceq.d" => "__builtin_msa_fceq_d",
+    "llvm.mips.fceq.w" => "__builtin_msa_fceq_w",
+    "llvm.mips.fclass.d" => "__builtin_msa_fclass_d",
+    "llvm.mips.fclass.w" => "__builtin_msa_fclass_w",
+    "llvm.mips.fcle.d" => "__builtin_msa_fcle_d",
+    "llvm.mips.fcle.w" => "__builtin_msa_fcle_w",
+    "llvm.mips.fclt.d" => "__builtin_msa_fclt_d",
+    "llvm.mips.fclt.w" => "__builtin_msa_fclt_w",
+    "llvm.mips.fcne.d" => "__builtin_msa_fcne_d",
+    "llvm.mips.fcne.w" => "__builtin_msa_fcne_w",
+    "llvm.mips.fcor.d" => "__builtin_msa_fcor_d",
+    "llvm.mips.fcor.w" => "__builtin_msa_fcor_w",
+    "llvm.mips.fcueq.d" => "__builtin_msa_fcueq_d",
+    "llvm.mips.fcueq.w" => "__builtin_msa_fcueq_w",
+    "llvm.mips.fcule.d" => "__builtin_msa_fcule_d",
+    "llvm.mips.fcule.w" => "__builtin_msa_fcule_w",
+    "llvm.mips.fcult.d" => "__builtin_msa_fcult_d",
+    "llvm.mips.fcult.w" => "__builtin_msa_fcult_w",
+    "llvm.mips.fcun.d" => "__builtin_msa_fcun_d",
+    "llvm.mips.fcun.w" => "__builtin_msa_fcun_w",
+    "llvm.mips.fcune.d" => "__builtin_msa_fcune_d",
+    "llvm.mips.fcune.w" => "__builtin_msa_fcune_w",
+    "llvm.mips.fdiv.d" => "__builtin_msa_fdiv_d",
+    "llvm.mips.fdiv.w" => "__builtin_msa_fdiv_w",
+    "llvm.mips.fexdo.w" => "__builtin_msa_fexdo_w",
+    "llvm.mips.fexp2.d" => "__builtin_msa_fexp2_d",
+    "llvm.mips.fexp2.w" => "__builtin_msa_fexp2_w",
+    "llvm.mips.fexupl.d" => "__builtin_msa_fexupl_d",
+    "llvm.mips.fexupr.d" => "__builtin_msa_fexupr_d",
+    "llvm.mips.ffint.s.d" => "__builtin_msa_ffint_s_d",
+    "llvm.mips.ffint.s.w" => "__builtin_msa_ffint_s_w",
+    "llvm.mips.ffint.u.d" => "__builtin_msa_ffint_u_d",
+    "llvm.mips.ffint.u.w" => "__builtin_msa_ffint_u_w",
+    "llvm.mips.ffql.d" => "__builtin_msa_ffql_d",
+    "llvm.mips.ffql.w" => "__builtin_msa_ffql_w",
+    "llvm.mips.ffqr.d" => "__builtin_msa_ffqr_d",
+    "llvm.mips.ffqr.w" => "__builtin_msa_ffqr_w",
+    "llvm.mips.fill.b" => "__builtin_msa_fill_b",
+    "llvm.mips.fill.d" => "__builtin_msa_fill_d",
+    "llvm.mips.fill.h" => "__builtin_msa_fill_h",
+    "llvm.mips.fill.w" => "__builtin_msa_fill_w",
+    "llvm.mips.flog2.d" => "__builtin_msa_flog2_d",
+    "llvm.mips.flog2.w" => "__builtin_msa_flog2_w",
+    "llvm.mips.fmadd.d" => "__builtin_msa_fmadd_d",
+    "llvm.mips.fmadd.w" => "__builtin_msa_fmadd_w",
+    "llvm.mips.fmax.a.d" => "__builtin_msa_fmax_a_d",
+    "llvm.mips.fmax.a.w" => "__builtin_msa_fmax_a_w",
+    "llvm.mips.fmax.d" => "__builtin_msa_fmax_d",
+    "llvm.mips.fmax.w" => "__builtin_msa_fmax_w",
+    "llvm.mips.fmin.a.d" => "__builtin_msa_fmin_a_d",
+    "llvm.mips.fmin.a.w" => "__builtin_msa_fmin_a_w",
+    "llvm.mips.fmin.d" => "__builtin_msa_fmin_d",
+    "llvm.mips.fmin.w" => "__builtin_msa_fmin_w",
+    "llvm.mips.fmsub.d" => "__builtin_msa_fmsub_d",
+    "llvm.mips.fmsub.w" => "__builtin_msa_fmsub_w",
+    "llvm.mips.fmul.d" => "__builtin_msa_fmul_d",
+    "llvm.mips.fmul.w" => "__builtin_msa_fmul_w",
+    "llvm.mips.frcp.d" => "__builtin_msa_frcp_d",
+    "llvm.mips.frcp.w" => "__builtin_msa_frcp_w",
+    "llvm.mips.frint.d" => "__builtin_msa_frint_d",
+    "llvm.mips.frint.w" => "__builtin_msa_frint_w",
+    "llvm.mips.frsqrt.d" => "__builtin_msa_frsqrt_d",
+    "llvm.mips.frsqrt.w" => "__builtin_msa_frsqrt_w",
+    "llvm.mips.fsaf.d" => "__builtin_msa_fsaf_d",
+    "llvm.mips.fsaf.w" => "__builtin_msa_fsaf_w",
+    "llvm.mips.fseq.d" => "__builtin_msa_fseq_d",
+    "llvm.mips.fseq.w" => "__builtin_msa_fseq_w",
+    "llvm.mips.fsle.d" => "__builtin_msa_fsle_d",
+    "llvm.mips.fsle.w" => "__builtin_msa_fsle_w",
+    "llvm.mips.fslt.d" => "__builtin_msa_fslt_d",
+    "llvm.mips.fslt.w" => "__builtin_msa_fslt_w",
+    "llvm.mips.fsne.d" => "__builtin_msa_fsne_d",
+    "llvm.mips.fsne.w" => "__builtin_msa_fsne_w",
+    "llvm.mips.fsor.d" => "__builtin_msa_fsor_d",
+    "llvm.mips.fsor.w" => "__builtin_msa_fsor_w",
+    "llvm.mips.fsqrt.d" => "__builtin_msa_fsqrt_d",
+    "llvm.mips.fsqrt.w" => "__builtin_msa_fsqrt_w",
+    "llvm.mips.fsub.d" => "__builtin_msa_fsub_d",
+    "llvm.mips.fsub.w" => "__builtin_msa_fsub_w",
+    "llvm.mips.fsueq.d" => "__builtin_msa_fsueq_d",
+    "llvm.mips.fsueq.w" => "__builtin_msa_fsueq_w",
+    "llvm.mips.fsule.d" => "__builtin_msa_fsule_d",
+    "llvm.mips.fsule.w" => "__builtin_msa_fsule_w",
+    "llvm.mips.fsult.d" => "__builtin_msa_fsult_d",
+    "llvm.mips.fsult.w" => "__builtin_msa_fsult_w",
+    "llvm.mips.fsun.d" => "__builtin_msa_fsun_d",
+    "llvm.mips.fsun.w" => "__builtin_msa_fsun_w",
+    "llvm.mips.fsune.d" => "__builtin_msa_fsune_d",
+    "llvm.mips.fsune.w" => "__builtin_msa_fsune_w",
+    "llvm.mips.ftint.s.d" => "__builtin_msa_ftint_s_d",
+    "llvm.mips.ftint.s.w" => "__builtin_msa_ftint_s_w",
+    "llvm.mips.ftint.u.d" => "__builtin_msa_ftint_u_d",
+    "llvm.mips.ftint.u.w" => "__builtin_msa_ftint_u_w",
+    "llvm.mips.ftq.h" => "__builtin_msa_ftq_h",
+    "llvm.mips.ftq.w" => "__builtin_msa_ftq_w",
+    "llvm.mips.ftrunc.s.d" => "__builtin_msa_ftrunc_s_d",
+    "llvm.mips.ftrunc.s.w" => "__builtin_msa_ftrunc_s_w",
+    "llvm.mips.ftrunc.u.d" => "__builtin_msa_ftrunc_u_d",
+    "llvm.mips.ftrunc.u.w" => "__builtin_msa_ftrunc_u_w",
+    "llvm.mips.hadd.s.d" => "__builtin_msa_hadd_s_d",
+    "llvm.mips.hadd.s.h" => "__builtin_msa_hadd_s_h",
+    "llvm.mips.hadd.s.w" => "__builtin_msa_hadd_s_w",
+    "llvm.mips.hadd.u.d" => "__builtin_msa_hadd_u_d",
+    "llvm.mips.hadd.u.h" => "__builtin_msa_hadd_u_h",
+    "llvm.mips.hadd.u.w" => "__builtin_msa_hadd_u_w",
+    "llvm.mips.hsub.s.d" => "__builtin_msa_hsub_s_d",
+    "llvm.mips.hsub.s.h" => "__builtin_msa_hsub_s_h",
+    "llvm.mips.hsub.s.w" => "__builtin_msa_hsub_s_w",
+    "llvm.mips.hsub.u.d" => "__builtin_msa_hsub_u_d",
+    "llvm.mips.hsub.u.h" => "__builtin_msa_hsub_u_h",
+    "llvm.mips.hsub.u.w" => "__builtin_msa_hsub_u_w",
+    "llvm.mips.ilvev.b" => "__builtin_msa_ilvev_b",
+    "llvm.mips.ilvev.d" => "__builtin_msa_ilvev_d",
+    "llvm.mips.ilvev.h" => "__builtin_msa_ilvev_h",
+    "llvm.mips.ilvev.w" => "__builtin_msa_ilvev_w",
+    "llvm.mips.ilvl.b" => "__builtin_msa_ilvl_b",
+    "llvm.mips.ilvl.d" => "__builtin_msa_ilvl_d",
+    "llvm.mips.ilvl.h" => "__builtin_msa_ilvl_h",
+    "llvm.mips.ilvl.w" => "__builtin_msa_ilvl_w",
+    "llvm.mips.ilvod.b" => "__builtin_msa_ilvod_b",
+    "llvm.mips.ilvod.d" => "__builtin_msa_ilvod_d",
+    "llvm.mips.ilvod.h" => "__builtin_msa_ilvod_h",
+    "llvm.mips.ilvod.w" => "__builtin_msa_ilvod_w",
+    "llvm.mips.ilvr.b" => "__builtin_msa_ilvr_b",
+    "llvm.mips.ilvr.d" => "__builtin_msa_ilvr_d",
+    "llvm.mips.ilvr.h" => "__builtin_msa_ilvr_h",
+    "llvm.mips.ilvr.w" => "__builtin_msa_ilvr_w",
+    "llvm.mips.insert.b" => "__builtin_msa_insert_b",
+    "llvm.mips.insert.d" => "__builtin_msa_insert_d",
+    "llvm.mips.insert.h" => "__builtin_msa_insert_h",
+    "llvm.mips.insert.w" => "__builtin_msa_insert_w",
+    "llvm.mips.insv" => "__builtin_mips_insv",
+    "llvm.mips.insve.b" => "__builtin_msa_insve_b",
+    "llvm.mips.insve.d" => "__builtin_msa_insve_d",
+    "llvm.mips.insve.h" => "__builtin_msa_insve_h",
+    "llvm.mips.insve.w" => "__builtin_msa_insve_w",
+    "llvm.mips.lbux" => "__builtin_mips_lbux",
+    "llvm.mips.ld.b" => "__builtin_msa_ld_b",
+    "llvm.mips.ld.d" => "__builtin_msa_ld_d",
+    "llvm.mips.ld.h" => "__builtin_msa_ld_h",
+    "llvm.mips.ld.w" => "__builtin_msa_ld_w",
+    "llvm.mips.ldi.b" => "__builtin_msa_ldi_b",
+    "llvm.mips.ldi.d" => "__builtin_msa_ldi_d",
+    "llvm.mips.ldi.h" => "__builtin_msa_ldi_h",
+    "llvm.mips.ldi.w" => "__builtin_msa_ldi_w",
+    "llvm.mips.lhx" => "__builtin_mips_lhx",
+    "llvm.mips.lsa" => "__builtin_mips_lsa",
+    "llvm.mips.lwx" => "__builtin_mips_lwx",
+    "llvm.mips.madd" => "__builtin_mips_madd",
+    "llvm.mips.madd.q.h" => "__builtin_msa_madd_q_h",
+    "llvm.mips.madd.q.w" => "__builtin_msa_madd_q_w",
+    "llvm.mips.maddr.q.h" => "__builtin_msa_maddr_q_h",
+    "llvm.mips.maddr.q.w" => "__builtin_msa_maddr_q_w",
+    "llvm.mips.maddu" => "__builtin_mips_maddu",
+    "llvm.mips.maddv.b" => "__builtin_msa_maddv_b",
+    "llvm.mips.maddv.d" => "__builtin_msa_maddv_d",
+    "llvm.mips.maddv.h" => "__builtin_msa_maddv_h",
+    "llvm.mips.maddv.w" => "__builtin_msa_maddv_w",
+    "llvm.mips.max.a.b" => "__builtin_msa_max_a_b",
+    "llvm.mips.max.a.d" => "__builtin_msa_max_a_d",
+    "llvm.mips.max.a.h" => "__builtin_msa_max_a_h",
+    "llvm.mips.max.a.w" => "__builtin_msa_max_a_w",
+    "llvm.mips.max.s.b" => "__builtin_msa_max_s_b",
+    "llvm.mips.max.s.d" => "__builtin_msa_max_s_d",
+    "llvm.mips.max.s.h" => "__builtin_msa_max_s_h",
+    "llvm.mips.max.s.w" => "__builtin_msa_max_s_w",
+    "llvm.mips.max.u.b" => "__builtin_msa_max_u_b",
+    "llvm.mips.max.u.d" => "__builtin_msa_max_u_d",
+    "llvm.mips.max.u.h" => "__builtin_msa_max_u_h",
+    "llvm.mips.max.u.w" => "__builtin_msa_max_u_w",
+    "llvm.mips.maxi.s.b" => "__builtin_msa_maxi_s_b",
+    "llvm.mips.maxi.s.d" => "__builtin_msa_maxi_s_d",
+    "llvm.mips.maxi.s.h" => "__builtin_msa_maxi_s_h",
+    "llvm.mips.maxi.s.w" => "__builtin_msa_maxi_s_w",
+    "llvm.mips.maxi.u.b" => "__builtin_msa_maxi_u_b",
+    "llvm.mips.maxi.u.d" => "__builtin_msa_maxi_u_d",
+    "llvm.mips.maxi.u.h" => "__builtin_msa_maxi_u_h",
+    "llvm.mips.maxi.u.w" => "__builtin_msa_maxi_u_w",
+    "llvm.mips.min.a.b" => "__builtin_msa_min_a_b",
+    "llvm.mips.min.a.d" => "__builtin_msa_min_a_d",
+    "llvm.mips.min.a.h" => "__builtin_msa_min_a_h",
+    "llvm.mips.min.a.w" => "__builtin_msa_min_a_w",
+    "llvm.mips.min.s.b" => "__builtin_msa_min_s_b",
+    "llvm.mips.min.s.d" => "__builtin_msa_min_s_d",
+    "llvm.mips.min.s.h" => "__builtin_msa_min_s_h",
+    "llvm.mips.min.s.w" => "__builtin_msa_min_s_w",
+    "llvm.mips.min.u.b" => "__builtin_msa_min_u_b",
+    "llvm.mips.min.u.d" => "__builtin_msa_min_u_d",
+    "llvm.mips.min.u.h" => "__builtin_msa_min_u_h",
+    "llvm.mips.min.u.w" => "__builtin_msa_min_u_w",
+    "llvm.mips.mini.s.b" => "__builtin_msa_mini_s_b",
+    "llvm.mips.mini.s.d" => "__builtin_msa_mini_s_d",
+    "llvm.mips.mini.s.h" => "__builtin_msa_mini_s_h",
+    "llvm.mips.mini.s.w" => "__builtin_msa_mini_s_w",
+    "llvm.mips.mini.u.b" => "__builtin_msa_mini_u_b",
+    "llvm.mips.mini.u.d" => "__builtin_msa_mini_u_d",
+    "llvm.mips.mini.u.h" => "__builtin_msa_mini_u_h",
+    "llvm.mips.mini.u.w" => "__builtin_msa_mini_u_w",
+    "llvm.mips.mod.s.b" => "__builtin_msa_mod_s_b",
+    "llvm.mips.mod.s.d" => "__builtin_msa_mod_s_d",
+    "llvm.mips.mod.s.h" => "__builtin_msa_mod_s_h",
+    "llvm.mips.mod.s.w" => "__builtin_msa_mod_s_w",
+    "llvm.mips.mod.u.b" => "__builtin_msa_mod_u_b",
+    "llvm.mips.mod.u.d" => "__builtin_msa_mod_u_d",
+    "llvm.mips.mod.u.h" => "__builtin_msa_mod_u_h",
+    "llvm.mips.mod.u.w" => "__builtin_msa_mod_u_w",
+    "llvm.mips.modsub" => "__builtin_mips_modsub",
+    "llvm.mips.move.v" => "__builtin_msa_move_v",
+    "llvm.mips.msub" => "__builtin_mips_msub",
+    "llvm.mips.msub.q.h" => "__builtin_msa_msub_q_h",
+    "llvm.mips.msub.q.w" => "__builtin_msa_msub_q_w",
+    "llvm.mips.msubr.q.h" => "__builtin_msa_msubr_q_h",
+    "llvm.mips.msubr.q.w" => "__builtin_msa_msubr_q_w",
+    "llvm.mips.msubu" => "__builtin_mips_msubu",
+    "llvm.mips.msubv.b" => "__builtin_msa_msubv_b",
+    "llvm.mips.msubv.d" => "__builtin_msa_msubv_d",
+    "llvm.mips.msubv.h" => "__builtin_msa_msubv_h",
+    "llvm.mips.msubv.w" => "__builtin_msa_msubv_w",
+    "llvm.mips.mthlip" => "__builtin_mips_mthlip",
+    "llvm.mips.mul.ph" => "__builtin_mips_mul_ph",
+    "llvm.mips.mul.q.h" => "__builtin_msa_mul_q_h",
+    "llvm.mips.mul.q.w" => "__builtin_msa_mul_q_w",
+    "llvm.mips.mul.s.ph" => "__builtin_mips_mul_s_ph",
+    "llvm.mips.mulr.q.h" => "__builtin_msa_mulr_q_h",
+    "llvm.mips.mulr.q.w" => "__builtin_msa_mulr_q_w",
+    "llvm.mips.mulsa.w.ph" => "__builtin_mips_mulsa_w_ph",
+    "llvm.mips.mult" => "__builtin_mips_mult",
+    "llvm.mips.multu" => "__builtin_mips_multu",
+    "llvm.mips.mulv.b" => "__builtin_msa_mulv_b",
+    "llvm.mips.mulv.d" => "__builtin_msa_mulv_d",
+    "llvm.mips.mulv.h" => "__builtin_msa_mulv_h",
+    "llvm.mips.mulv.w" => "__builtin_msa_mulv_w",
+    "llvm.mips.nloc.b" => "__builtin_msa_nloc_b",
+    "llvm.mips.nloc.d" => "__builtin_msa_nloc_d",
+    "llvm.mips.nloc.h" => "__builtin_msa_nloc_h",
+    "llvm.mips.nloc.w" => "__builtin_msa_nloc_w",
+    "llvm.mips.nlzc.b" => "__builtin_msa_nlzc_b",
+    "llvm.mips.nlzc.d" => "__builtin_msa_nlzc_d",
+    "llvm.mips.nlzc.h" => "__builtin_msa_nlzc_h",
+    "llvm.mips.nlzc.w" => "__builtin_msa_nlzc_w",
+    "llvm.mips.nor.v" => "__builtin_msa_nor_v",
+    "llvm.mips.nori.b" => "__builtin_msa_nori_b",
+    "llvm.mips.or.v" => "__builtin_msa_or_v",
+    "llvm.mips.ori.b" => "__builtin_msa_ori_b",
+    "llvm.mips.pckev.b" => "__builtin_msa_pckev_b",
+    "llvm.mips.pckev.d" => "__builtin_msa_pckev_d",
+    "llvm.mips.pckev.h" => "__builtin_msa_pckev_h",
+    "llvm.mips.pckev.w" => "__builtin_msa_pckev_w",
+    "llvm.mips.pckod.b" => "__builtin_msa_pckod_b",
+    "llvm.mips.pckod.d" => "__builtin_msa_pckod_d",
+    "llvm.mips.pckod.h" => "__builtin_msa_pckod_h",
+    "llvm.mips.pckod.w" => "__builtin_msa_pckod_w",
+    "llvm.mips.pcnt.b" => "__builtin_msa_pcnt_b",
+    "llvm.mips.pcnt.d" => "__builtin_msa_pcnt_d",
+    "llvm.mips.pcnt.h" => "__builtin_msa_pcnt_h",
+    "llvm.mips.pcnt.w" => "__builtin_msa_pcnt_w",
+    "llvm.mips.pick.qb" => "__builtin_mips_pick_qb",
+    "llvm.mips.precr.qb.ph" => "__builtin_mips_precr_qb_ph",
+    "llvm.mips.precr.sra.ph.w" => "__builtin_mips_precr_sra_ph_w",
+    "llvm.mips.precr.sra.r.ph.w" => "__builtin_mips_precr_sra_r_ph_w",
+    "llvm.mips.prepend" => "__builtin_mips_prepend",
+    "llvm.mips.raddu.w.qb" => "__builtin_mips_raddu_w_qb",
+    "llvm.mips.rddsp" => "__builtin_mips_rddsp",
+    "llvm.mips.repl.qb" => "__builtin_mips_repl_qb",
+    "llvm.mips.sat.s.b" => "__builtin_msa_sat_s_b",
+    "llvm.mips.sat.s.d" => "__builtin_msa_sat_s_d",
+    "llvm.mips.sat.s.h" => "__builtin_msa_sat_s_h",
+    "llvm.mips.sat.s.w" => "__builtin_msa_sat_s_w",
+    "llvm.mips.sat.u.b" => "__builtin_msa_sat_u_b",
+    "llvm.mips.sat.u.d" => "__builtin_msa_sat_u_d",
+    "llvm.mips.sat.u.h" => "__builtin_msa_sat_u_h",
+    "llvm.mips.sat.u.w" => "__builtin_msa_sat_u_w",
+    "llvm.mips.shf.b" => "__builtin_msa_shf_b",
+    "llvm.mips.shf.h" => "__builtin_msa_shf_h",
+    "llvm.mips.shf.w" => "__builtin_msa_shf_w",
+    "llvm.mips.shilo" => "__builtin_mips_shilo",
+    "llvm.mips.shll.qb" => "__builtin_mips_shll_qb",
+    "llvm.mips.shra.qb" => "__builtin_mips_shra_qb",
+    "llvm.mips.shra.r.qb" => "__builtin_mips_shra_r_qb",
+    "llvm.mips.shrl.ph" => "__builtin_mips_shrl_ph",
+    "llvm.mips.shrl.qb" => "__builtin_mips_shrl_qb",
+    "llvm.mips.sld.b" => "__builtin_msa_sld_b",
+    "llvm.mips.sld.d" => "__builtin_msa_sld_d",
+    "llvm.mips.sld.h" => "__builtin_msa_sld_h",
+    "llvm.mips.sld.w" => "__builtin_msa_sld_w",
+    "llvm.mips.sldi.b" => "__builtin_msa_sldi_b",
+    "llvm.mips.sldi.d" => "__builtin_msa_sldi_d",
+    "llvm.mips.sldi.h" => "__builtin_msa_sldi_h",
+    "llvm.mips.sldi.w" => "__builtin_msa_sldi_w",
+    "llvm.mips.sll.b" => "__builtin_msa_sll_b",
+    "llvm.mips.sll.d" => "__builtin_msa_sll_d",
+    "llvm.mips.sll.h" => "__builtin_msa_sll_h",
+    "llvm.mips.sll.w" => "__builtin_msa_sll_w",
+    "llvm.mips.slli.b" => "__builtin_msa_slli_b",
+    "llvm.mips.slli.d" => "__builtin_msa_slli_d",
+    "llvm.mips.slli.h" => "__builtin_msa_slli_h",
+    "llvm.mips.slli.w" => "__builtin_msa_slli_w",
+    "llvm.mips.splat.b" => "__builtin_msa_splat_b",
+    "llvm.mips.splat.d" => "__builtin_msa_splat_d",
+    "llvm.mips.splat.h" => "__builtin_msa_splat_h",
+    "llvm.mips.splat.w" => "__builtin_msa_splat_w",
+    "llvm.mips.splati.b" => "__builtin_msa_splati_b",
+    "llvm.mips.splati.d" => "__builtin_msa_splati_d",
+    "llvm.mips.splati.h" => "__builtin_msa_splati_h",
+    "llvm.mips.splati.w" => "__builtin_msa_splati_w",
+    "llvm.mips.sra.b" => "__builtin_msa_sra_b",
+    "llvm.mips.sra.d" => "__builtin_msa_sra_d",
+    "llvm.mips.sra.h" => "__builtin_msa_sra_h",
+    "llvm.mips.sra.w" => "__builtin_msa_sra_w",
+    "llvm.mips.srai.b" => "__builtin_msa_srai_b",
+    "llvm.mips.srai.d" => "__builtin_msa_srai_d",
+    "llvm.mips.srai.h" => "__builtin_msa_srai_h",
+    "llvm.mips.srai.w" => "__builtin_msa_srai_w",
+    "llvm.mips.srar.b" => "__builtin_msa_srar_b",
+    "llvm.mips.srar.d" => "__builtin_msa_srar_d",
+    "llvm.mips.srar.h" => "__builtin_msa_srar_h",
+    "llvm.mips.srar.w" => "__builtin_msa_srar_w",
+    "llvm.mips.srari.b" => "__builtin_msa_srari_b",
+    "llvm.mips.srari.d" => "__builtin_msa_srari_d",
+    "llvm.mips.srari.h" => "__builtin_msa_srari_h",
+    "llvm.mips.srari.w" => "__builtin_msa_srari_w",
+    "llvm.mips.srl.b" => "__builtin_msa_srl_b",
+    "llvm.mips.srl.d" => "__builtin_msa_srl_d",
+    "llvm.mips.srl.h" => "__builtin_msa_srl_h",
+    "llvm.mips.srl.w" => "__builtin_msa_srl_w",
+    "llvm.mips.srli.b" => "__builtin_msa_srli_b",
+    "llvm.mips.srli.d" => "__builtin_msa_srli_d",
+    "llvm.mips.srli.h" => "__builtin_msa_srli_h",
+    "llvm.mips.srli.w" => "__builtin_msa_srli_w",
+    "llvm.mips.srlr.b" => "__builtin_msa_srlr_b",
+    "llvm.mips.srlr.d" => "__builtin_msa_srlr_d",
+    "llvm.mips.srlr.h" => "__builtin_msa_srlr_h",
+    "llvm.mips.srlr.w" => "__builtin_msa_srlr_w",
+    "llvm.mips.srlri.b" => "__builtin_msa_srlri_b",
+    "llvm.mips.srlri.d" => "__builtin_msa_srlri_d",
+    "llvm.mips.srlri.h" => "__builtin_msa_srlri_h",
+    "llvm.mips.srlri.w" => "__builtin_msa_srlri_w",
+    "llvm.mips.st.b" => "__builtin_msa_st_b",
+    "llvm.mips.st.d" => "__builtin_msa_st_d",
+    "llvm.mips.st.h" => "__builtin_msa_st_h",
+    "llvm.mips.st.w" => "__builtin_msa_st_w",
+    "llvm.mips.subs.s.b" => "__builtin_msa_subs_s_b",
+    "llvm.mips.subs.s.d" => "__builtin_msa_subs_s_d",
+    "llvm.mips.subs.s.h" => "__builtin_msa_subs_s_h",
+    "llvm.mips.subs.s.w" => "__builtin_msa_subs_s_w",
+    "llvm.mips.subs.u.b" => "__builtin_msa_subs_u_b",
+    "llvm.mips.subs.u.d" => "__builtin_msa_subs_u_d",
+    "llvm.mips.subs.u.h" => "__builtin_msa_subs_u_h",
+    "llvm.mips.subs.u.w" => "__builtin_msa_subs_u_w",
+    "llvm.mips.subsus.u.b" => "__builtin_msa_subsus_u_b",
+    "llvm.mips.subsus.u.d" => "__builtin_msa_subsus_u_d",
+    "llvm.mips.subsus.u.h" => "__builtin_msa_subsus_u_h",
+    "llvm.mips.subsus.u.w" => "__builtin_msa_subsus_u_w",
+    "llvm.mips.subsuu.s.b" => "__builtin_msa_subsuu_s_b",
+    "llvm.mips.subsuu.s.d" => "__builtin_msa_subsuu_s_d",
+    "llvm.mips.subsuu.s.h" => "__builtin_msa_subsuu_s_h",
+    "llvm.mips.subsuu.s.w" => "__builtin_msa_subsuu_s_w",
+    "llvm.mips.subu.ph" => "__builtin_mips_subu_ph",
+    "llvm.mips.subu.qb" => "__builtin_mips_subu_qb",
+    "llvm.mips.subu.s.ph" => "__builtin_mips_subu_s_ph",
+    "llvm.mips.subu.s.qb" => "__builtin_mips_subu_s_qb",
+    "llvm.mips.subuh.qb" => "__builtin_mips_subuh_qb",
+    "llvm.mips.subuh.r.qb" => "__builtin_mips_subuh_r_qb",
+    "llvm.mips.subv.b" => "__builtin_msa_subv_b",
+    "llvm.mips.subv.d" => "__builtin_msa_subv_d",
+    "llvm.mips.subv.h" => "__builtin_msa_subv_h",
+    "llvm.mips.subv.w" => "__builtin_msa_subv_w",
+    "llvm.mips.subvi.b" => "__builtin_msa_subvi_b",
+    "llvm.mips.subvi.d" => "__builtin_msa_subvi_d",
+    "llvm.mips.subvi.h" => "__builtin_msa_subvi_h",
+    "llvm.mips.subvi.w" => "__builtin_msa_subvi_w",
+    "llvm.mips.vshf.b" => "__builtin_msa_vshf_b",
+    "llvm.mips.vshf.d" => "__builtin_msa_vshf_d",
+    "llvm.mips.vshf.h" => "__builtin_msa_vshf_h",
+    "llvm.mips.vshf.w" => "__builtin_msa_vshf_w",
+    "llvm.mips.wrdsp" => "__builtin_mips_wrdsp",
+    "llvm.mips.xor.v" => "__builtin_msa_xor_v",
+    "llvm.mips.xori.b" => "__builtin_msa_xori_b",
     // nvvm
     "llvm.nvvm.abs.i" => "__nvvm_abs_i",
     "llvm.nvvm.abs.ll" => "__nvvm_abs_ll",
@@ -1519,25 +2034,161 @@ match name {
     "llvm.nvvm.ull2f.rn" => "__nvvm_ull2f_rn",
     "llvm.nvvm.ull2f.rp" => "__nvvm_ull2f_rp",
     "llvm.nvvm.ull2f.rz" => "__nvvm_ull2f_rz",
-    // arm
-    "llvm.arm.cdp" => "__builtin_arm_cdp",
-    "llvm.arm.cdp2" => "__builtin_arm_cdp2",
-    "llvm.arm.dmb" => "__builtin_arm_dmb",
-    "llvm.arm.dsb" => "__builtin_arm_dsb",
-    "llvm.arm.get.fpscr" => "__builtin_arm_get_fpscr",
-    "llvm.arm.isb" => "__builtin_arm_isb",
-    "llvm.arm.mcr" => "__builtin_arm_mcr",
-    "llvm.arm.mcr2" => "__builtin_arm_mcr2",
-    "llvm.arm.mcrr" => "__builtin_arm_mcrr",
-    "llvm.arm.mcrr2" => "__builtin_arm_mcrr2",
-    "llvm.arm.mrc" => "__builtin_arm_mrc",
-    "llvm.arm.mrc2" => "__builtin_arm_mrc2",
-    "llvm.arm.qadd" => "__builtin_arm_qadd",
-    "llvm.arm.qsub" => "__builtin_arm_qsub",
-    "llvm.arm.set.fpscr" => "__builtin_arm_set_fpscr",
-    "llvm.arm.ssat" => "__builtin_arm_ssat",
-    "llvm.arm.thread.pointer" => "__builtin_thread_pointer",
-    "llvm.arm.usat" => "__builtin_arm_usat",
+    // ppc
+    "llvm.ppc.altivec.dss" => "__builtin_altivec_dss",
+    "llvm.ppc.altivec.dssall" => "__builtin_altivec_dssall",
+    "llvm.ppc.altivec.dst" => "__builtin_altivec_dst",
+    "llvm.ppc.altivec.dstst" => "__builtin_altivec_dstst",
+    "llvm.ppc.altivec.dststt" => "__builtin_altivec_dststt",
+    "llvm.ppc.altivec.dstt" => "__builtin_altivec_dstt",
+    "llvm.ppc.altivec.mfvscr" => "__builtin_altivec_mfvscr",
+    "llvm.ppc.altivec.mtvscr" => "__builtin_altivec_mtvscr",
+    "llvm.ppc.altivec.vaddcuw" => "__builtin_altivec_vaddcuw",
+    "llvm.ppc.altivec.vaddsbs" => "__builtin_altivec_vaddsbs",
+    "llvm.ppc.altivec.vaddshs" => "__builtin_altivec_vaddshs",
+    "llvm.ppc.altivec.vaddsws" => "__builtin_altivec_vaddsws",
+    "llvm.ppc.altivec.vaddubs" => "__builtin_altivec_vaddubs",
+    "llvm.ppc.altivec.vadduhs" => "__builtin_altivec_vadduhs",
+    "llvm.ppc.altivec.vadduws" => "__builtin_altivec_vadduws",
+    "llvm.ppc.altivec.vavgsb" => "__builtin_altivec_vavgsb",
+    "llvm.ppc.altivec.vavgsh" => "__builtin_altivec_vavgsh",
+    "llvm.ppc.altivec.vavgsw" => "__builtin_altivec_vavgsw",
+    "llvm.ppc.altivec.vavgub" => "__builtin_altivec_vavgub",
+    "llvm.ppc.altivec.vavguh" => "__builtin_altivec_vavguh",
+    "llvm.ppc.altivec.vavguw" => "__builtin_altivec_vavguw",
+    "llvm.ppc.altivec.vcfsx" => "__builtin_altivec_vcfsx",
+    "llvm.ppc.altivec.vcfux" => "__builtin_altivec_vcfux",
+    "llvm.ppc.altivec.vcmpbfp" => "__builtin_altivec_vcmpbfp",
+    "llvm.ppc.altivec.vcmpbfp.p" => "__builtin_altivec_vcmpbfp_p",
+    "llvm.ppc.altivec.vcmpeqfp" => "__builtin_altivec_vcmpeqfp",
+    "llvm.ppc.altivec.vcmpeqfp.p" => "__builtin_altivec_vcmpeqfp_p",
+    "llvm.ppc.altivec.vcmpequb" => "__builtin_altivec_vcmpequb",
+    "llvm.ppc.altivec.vcmpequb.p" => "__builtin_altivec_vcmpequb_p",
+    "llvm.ppc.altivec.vcmpequh" => "__builtin_altivec_vcmpequh",
+    "llvm.ppc.altivec.vcmpequh.p" => "__builtin_altivec_vcmpequh_p",
+    "llvm.ppc.altivec.vcmpequw" => "__builtin_altivec_vcmpequw",
+    "llvm.ppc.altivec.vcmpequw.p" => "__builtin_altivec_vcmpequw_p",
+    "llvm.ppc.altivec.vcmpgefp" => "__builtin_altivec_vcmpgefp",
+    "llvm.ppc.altivec.vcmpgefp.p" => "__builtin_altivec_vcmpgefp_p",
+    "llvm.ppc.altivec.vcmpgtfp" => "__builtin_altivec_vcmpgtfp",
+    "llvm.ppc.altivec.vcmpgtfp.p" => "__builtin_altivec_vcmpgtfp_p",
+    "llvm.ppc.altivec.vcmpgtsb" => "__builtin_altivec_vcmpgtsb",
+    "llvm.ppc.altivec.vcmpgtsb.p" => "__builtin_altivec_vcmpgtsb_p",
+    "llvm.ppc.altivec.vcmpgtsh" => "__builtin_altivec_vcmpgtsh",
+    "llvm.ppc.altivec.vcmpgtsh.p" => "__builtin_altivec_vcmpgtsh_p",
+    "llvm.ppc.altivec.vcmpgtsw" => "__builtin_altivec_vcmpgtsw",
+    "llvm.ppc.altivec.vcmpgtsw.p" => "__builtin_altivec_vcmpgtsw_p",
+    "llvm.ppc.altivec.vcmpgtub" => "__builtin_altivec_vcmpgtub",
+    "llvm.ppc.altivec.vcmpgtub.p" => "__builtin_altivec_vcmpgtub_p",
+    "llvm.ppc.altivec.vcmpgtuh" => "__builtin_altivec_vcmpgtuh",
+    "llvm.ppc.altivec.vcmpgtuh.p" => "__builtin_altivec_vcmpgtuh_p",
+    "llvm.ppc.altivec.vcmpgtuw" => "__builtin_altivec_vcmpgtuw",
+    "llvm.ppc.altivec.vcmpgtuw.p" => "__builtin_altivec_vcmpgtuw_p",
+    "llvm.ppc.altivec.vctsxs" => "__builtin_altivec_vctsxs",
+    "llvm.ppc.altivec.vctuxs" => "__builtin_altivec_vctuxs",
+    "llvm.ppc.altivec.vexptefp" => "__builtin_altivec_vexptefp",
+    "llvm.ppc.altivec.vlogefp" => "__builtin_altivec_vlogefp",
+    "llvm.ppc.altivec.vmaddfp" => "__builtin_altivec_vmaddfp",
+    "llvm.ppc.altivec.vmaxfp" => "__builtin_altivec_vmaxfp",
+    "llvm.ppc.altivec.vmaxsb" => "__builtin_altivec_vmaxsb",
+    "llvm.ppc.altivec.vmaxsh" => "__builtin_altivec_vmaxsh",
+    "llvm.ppc.altivec.vmaxsw" => "__builtin_altivec_vmaxsw",
+    "llvm.ppc.altivec.vmaxub" => "__builtin_altivec_vmaxub",
+    "llvm.ppc.altivec.vmaxuh" => "__builtin_altivec_vmaxuh",
+    "llvm.ppc.altivec.vmaxuw" => "__builtin_altivec_vmaxuw",
+    "llvm.ppc.altivec.vmhaddshs" => "__builtin_altivec_vmhaddshs",
+    "llvm.ppc.altivec.vmhraddshs" => "__builtin_altivec_vmhraddshs",
+    "llvm.ppc.altivec.vminfp" => "__builtin_altivec_vminfp",
+    "llvm.ppc.altivec.vminsb" => "__builtin_altivec_vminsb",
+    "llvm.ppc.altivec.vminsh" => "__builtin_altivec_vminsh",
+    "llvm.ppc.altivec.vminsw" => "__builtin_altivec_vminsw",
+    "llvm.ppc.altivec.vminub" => "__builtin_altivec_vminub",
+    "llvm.ppc.altivec.vminuh" => "__builtin_altivec_vminuh",
+    "llvm.ppc.altivec.vminuw" => "__builtin_altivec_vminuw",
+    "llvm.ppc.altivec.vmladduhm" => "__builtin_altivec_vmladduhm",
+    "llvm.ppc.altivec.vmsummbm" => "__builtin_altivec_vmsummbm",
+    "llvm.ppc.altivec.vmsumshm" => "__builtin_altivec_vmsumshm",
+    "llvm.ppc.altivec.vmsumshs" => "__builtin_altivec_vmsumshs",
+    "llvm.ppc.altivec.vmsumubm" => "__builtin_altivec_vmsumubm",
+    "llvm.ppc.altivec.vmsumuhm" => "__builtin_altivec_vmsumuhm",
+    "llvm.ppc.altivec.vmsumuhs" => "__builtin_altivec_vmsumuhs",
+    "llvm.ppc.altivec.vmulesb" => "__builtin_altivec_vmulesb",
+    "llvm.ppc.altivec.vmulesh" => "__builtin_altivec_vmulesh",
+    "llvm.ppc.altivec.vmuleub" => "__builtin_altivec_vmuleub",
+    "llvm.ppc.altivec.vmuleuh" => "__builtin_altivec_vmuleuh",
+    "llvm.ppc.altivec.vmulosb" => "__builtin_altivec_vmulosb",
+    "llvm.ppc.altivec.vmulosh" => "__builtin_altivec_vmulosh",
+    "llvm.ppc.altivec.vmuloub" => "__builtin_altivec_vmuloub",
+    "llvm.ppc.altivec.vmulouh" => "__builtin_altivec_vmulouh",
+    "llvm.ppc.altivec.vnmsubfp" => "__builtin_altivec_vnmsubfp",
+    "llvm.ppc.altivec.vperm" => "__builtin_altivec_vperm_4si",
+    "llvm.ppc.altivec.vpkpx" => "__builtin_altivec_vpkpx",
+    "llvm.ppc.altivec.vpkshss" => "__builtin_altivec_vpkshss",
+    "llvm.ppc.altivec.vpkshus" => "__builtin_altivec_vpkshus",
+    "llvm.ppc.altivec.vpkswss" => "__builtin_altivec_vpkswss",
+    "llvm.ppc.altivec.vpkswus" => "__builtin_altivec_vpkswus",
+    "llvm.ppc.altivec.vpkuhus" => "__builtin_altivec_vpkuhus",
+    "llvm.ppc.altivec.vpkuwus" => "__builtin_altivec_vpkuwus",
+    "llvm.ppc.altivec.vrefp" => "__builtin_altivec_vrefp",
+    "llvm.ppc.altivec.vrfim" => "__builtin_altivec_vrfim",
+    "llvm.ppc.altivec.vrfin" => "__builtin_altivec_vrfin",
+    "llvm.ppc.altivec.vrfip" => "__builtin_altivec_vrfip",
+    "llvm.ppc.altivec.vrfiz" => "__builtin_altivec_vrfiz",
+    "llvm.ppc.altivec.vrlb" => "__builtin_altivec_vrlb",
+    "llvm.ppc.altivec.vrlh" => "__builtin_altivec_vrlh",
+    "llvm.ppc.altivec.vrlw" => "__builtin_altivec_vrlw",
+    "llvm.ppc.altivec.vrsqrtefp" => "__builtin_altivec_vrsqrtefp",
+    "llvm.ppc.altivec.vsel" => "__builtin_altivec_vsel_4si",
+    "llvm.ppc.altivec.vsl" => "__builtin_altivec_vsl",
+    "llvm.ppc.altivec.vslb" => "__builtin_altivec_vslb",
+    "llvm.ppc.altivec.vslh" => "__builtin_altivec_vslh",
+    "llvm.ppc.altivec.vslo" => "__builtin_altivec_vslo",
+    "llvm.ppc.altivec.vslw" => "__builtin_altivec_vslw",
+    "llvm.ppc.altivec.vsr" => "__builtin_altivec_vsr",
+    "llvm.ppc.altivec.vsrab" => "__builtin_altivec_vsrab",
+    "llvm.ppc.altivec.vsrah" => "__builtin_altivec_vsrah",
+    "llvm.ppc.altivec.vsraw" => "__builtin_altivec_vsraw",
+    "llvm.ppc.altivec.vsrb" => "__builtin_altivec_vsrb",
+    "llvm.ppc.altivec.vsrh" => "__builtin_altivec_vsrh",
+    "llvm.ppc.altivec.vsro" => "__builtin_altivec_vsro",
+    "llvm.ppc.altivec.vsrw" => "__builtin_altivec_vsrw",
+    "llvm.ppc.altivec.vsubcuw" => "__builtin_altivec_vsubcuw",
+    "llvm.ppc.altivec.vsubsbs" => "__builtin_altivec_vsubsbs",
+    "llvm.ppc.altivec.vsubshs" => "__builtin_altivec_vsubshs",
+    "llvm.ppc.altivec.vsubsws" => "__builtin_altivec_vsubsws",
+    "llvm.ppc.altivec.vsububs" => "__builtin_altivec_vsububs",
+    "llvm.ppc.altivec.vsubuhs" => "__builtin_altivec_vsubuhs",
+    "llvm.ppc.altivec.vsubuws" => "__builtin_altivec_vsubuws",
+    "llvm.ppc.altivec.vsum2sws" => "__builtin_altivec_vsum2sws",
+    "llvm.ppc.altivec.vsum4sbs" => "__builtin_altivec_vsum4sbs",
+    "llvm.ppc.altivec.vsum4shs" => "__builtin_altivec_vsum4shs",
+    "llvm.ppc.altivec.vsum4ubs" => "__builtin_altivec_vsum4ubs",
+    "llvm.ppc.altivec.vsumsws" => "__builtin_altivec_vsumsws",
+    "llvm.ppc.altivec.vupkhpx" => "__builtin_altivec_vupkhpx",
+    "llvm.ppc.altivec.vupkhsb" => "__builtin_altivec_vupkhsb",
+    "llvm.ppc.altivec.vupkhsh" => "__builtin_altivec_vupkhsh",
+    "llvm.ppc.altivec.vupklpx" => "__builtin_altivec_vupklpx",
+    "llvm.ppc.altivec.vupklsb" => "__builtin_altivec_vupklsb",
+    "llvm.ppc.altivec.vupklsh" => "__builtin_altivec_vupklsh",
+    // ptx
+    "llvm.ptx.bar.sync" => "__builtin_ptx_bar_sync",
+    "llvm.ptx.read.clock" => "__builtin_ptx_read_clock",
+    "llvm.ptx.read.clock64" => "__builtin_ptx_read_clock64",
+    "llvm.ptx.read.gridid" => "__builtin_ptx_read_gridid",
+    "llvm.ptx.read.laneid" => "__builtin_ptx_read_laneid",
+    "llvm.ptx.read.lanemask.eq" => "__builtin_ptx_read_lanemask_eq",
+    "llvm.ptx.read.lanemask.ge" => "__builtin_ptx_read_lanemask_ge",
+    "llvm.ptx.read.lanemask.gt" => "__builtin_ptx_read_lanemask_gt",
+    "llvm.ptx.read.lanemask.le" => "__builtin_ptx_read_lanemask_le",
+    "llvm.ptx.read.lanemask.lt" => "__builtin_ptx_read_lanemask_lt",
+    "llvm.ptx.read.nsmid" => "__builtin_ptx_read_nsmid",
+    "llvm.ptx.read.nwarpid" => "__builtin_ptx_read_nwarpid",
+    "llvm.ptx.read.pm0" => "__builtin_ptx_read_pm0",
+    "llvm.ptx.read.pm1" => "__builtin_ptx_read_pm1",
+    "llvm.ptx.read.pm2" => "__builtin_ptx_read_pm2",
+    "llvm.ptx.read.pm3" => "__builtin_ptx_read_pm3",
+    "llvm.ptx.read.smid" => "__builtin_ptx_read_smid",
+    "llvm.ptx.read.warpid" => "__builtin_ptx_read_warpid",
     // x86
     "llvm.x86.addcarry.u32" => "__builtin_ia32_addcarry_u32",
     "llvm.x86.addcarry.u64" => "__builtin_ia32_addcarry_u64",
@@ -2305,661 +2956,10 @@ match name {
     "llvm.x86.xop.vpshlq" => "__builtin_ia32_vpshlq",
     "llvm.x86.xop.vpshlw" => "__builtin_ia32_vpshlw",
     "llvm.x86.xtest" => "__builtin_ia32_xtest",
-    // AMDGPU
-    "llvm.AMDGPU.div.fixup.f32" => "__builtin_amdgpu_div_fixup",
-    "llvm.AMDGPU.div.fixup.f64" => "__builtin_amdgpu_div_fixup",
-    "llvm.AMDGPU.div.fixup.v2f64" => "__builtin_amdgpu_div_fixup",
-    "llvm.AMDGPU.div.fixup.v4f32" => "__builtin_amdgpu_div_fixup",
-    "llvm.AMDGPU.div.fmas.f32" => "__builtin_amdgpu_div_fmas",
-    "llvm.AMDGPU.div.fmas.f64" => "__builtin_amdgpu_div_fmas",
-    "llvm.AMDGPU.div.fmas.v2f64" => "__builtin_amdgpu_div_fmas",
-    "llvm.AMDGPU.div.fmas.v4f32" => "__builtin_amdgpu_div_fmas",
-    "llvm.AMDGPU.ldexp.f32" => "__builtin_amdgpu_ldexp",
-    "llvm.AMDGPU.ldexp.f64" => "__builtin_amdgpu_ldexp",
-    "llvm.AMDGPU.ldexp.v2f64" => "__builtin_amdgpu_ldexp",
-    "llvm.AMDGPU.ldexp.v4f32" => "__builtin_amdgpu_ldexp",
-    "llvm.AMDGPU.rcp.f32" => "__builtin_amdgpu_rcp",
-    "llvm.AMDGPU.rcp.f64" => "__builtin_amdgpu_rcp",
-    "llvm.AMDGPU.rcp.v2f64" => "__builtin_amdgpu_rcp",
-    "llvm.AMDGPU.rcp.v4f32" => "__builtin_amdgpu_rcp",
-    "llvm.AMDGPU.rsq.clamped.f32" => "__builtin_amdgpu_rsq_clamped",
-    "llvm.AMDGPU.rsq.clamped.f64" => "__builtin_amdgpu_rsq_clamped",
-    "llvm.AMDGPU.rsq.clamped.v2f64" => "__builtin_amdgpu_rsq_clamped",
-    "llvm.AMDGPU.rsq.clamped.v4f32" => "__builtin_amdgpu_rsq_clamped",
-    "llvm.AMDGPU.rsq.f32" => "__builtin_amdgpu_rsq",
-    "llvm.AMDGPU.rsq.f64" => "__builtin_amdgpu_rsq",
-    "llvm.AMDGPU.rsq.v2f64" => "__builtin_amdgpu_rsq",
-    "llvm.AMDGPU.rsq.v4f32" => "__builtin_amdgpu_rsq",
-    "llvm.AMDGPU.trig.preop.f32" => "__builtin_amdgpu_trig_preop",
-    "llvm.AMDGPU.trig.preop.f64" => "__builtin_amdgpu_trig_preop",
-    "llvm.AMDGPU.trig.preop.v2f64" => "__builtin_amdgpu_trig_preop",
-    "llvm.AMDGPU.trig.preop.v4f32" => "__builtin_amdgpu_trig_preop",
-    // mips
-    "llvm.mips.add.a.b" => "__builtin_msa_add_a_b",
-    "llvm.mips.add.a.d" => "__builtin_msa_add_a_d",
-    "llvm.mips.add.a.h" => "__builtin_msa_add_a_h",
-    "llvm.mips.add.a.w" => "__builtin_msa_add_a_w",
-    "llvm.mips.adds.a.b" => "__builtin_msa_adds_a_b",
-    "llvm.mips.adds.a.d" => "__builtin_msa_adds_a_d",
-    "llvm.mips.adds.a.h" => "__builtin_msa_adds_a_h",
-    "llvm.mips.adds.a.w" => "__builtin_msa_adds_a_w",
-    "llvm.mips.adds.s.b" => "__builtin_msa_adds_s_b",
-    "llvm.mips.adds.s.d" => "__builtin_msa_adds_s_d",
-    "llvm.mips.adds.s.h" => "__builtin_msa_adds_s_h",
-    "llvm.mips.adds.s.w" => "__builtin_msa_adds_s_w",
-    "llvm.mips.adds.u.b" => "__builtin_msa_adds_u_b",
-    "llvm.mips.adds.u.d" => "__builtin_msa_adds_u_d",
-    "llvm.mips.adds.u.h" => "__builtin_msa_adds_u_h",
-    "llvm.mips.adds.u.w" => "__builtin_msa_adds_u_w",
-    "llvm.mips.addsc" => "__builtin_mips_addsc",
-    "llvm.mips.addu.ph" => "__builtin_mips_addu_ph",
-    "llvm.mips.addu.qb" => "__builtin_mips_addu_qb",
-    "llvm.mips.addu.s.ph" => "__builtin_mips_addu_s_ph",
-    "llvm.mips.addu.s.qb" => "__builtin_mips_addu_s_qb",
-    "llvm.mips.adduh.qb" => "__builtin_mips_adduh_qb",
-    "llvm.mips.adduh.r.qb" => "__builtin_mips_adduh_r_qb",
-    "llvm.mips.addv.b" => "__builtin_msa_addv_b",
-    "llvm.mips.addv.d" => "__builtin_msa_addv_d",
-    "llvm.mips.addv.h" => "__builtin_msa_addv_h",
-    "llvm.mips.addv.w" => "__builtin_msa_addv_w",
-    "llvm.mips.addvi.b" => "__builtin_msa_addvi_b",
-    "llvm.mips.addvi.d" => "__builtin_msa_addvi_d",
-    "llvm.mips.addvi.h" => "__builtin_msa_addvi_h",
-    "llvm.mips.addvi.w" => "__builtin_msa_addvi_w",
-    "llvm.mips.addwc" => "__builtin_mips_addwc",
-    "llvm.mips.and.v" => "__builtin_msa_and_v",
-    "llvm.mips.andi.b" => "__builtin_msa_andi_b",
-    "llvm.mips.append" => "__builtin_mips_append",
-    "llvm.mips.asub.s.b" => "__builtin_msa_asub_s_b",
-    "llvm.mips.asub.s.d" => "__builtin_msa_asub_s_d",
-    "llvm.mips.asub.s.h" => "__builtin_msa_asub_s_h",
-    "llvm.mips.asub.s.w" => "__builtin_msa_asub_s_w",
-    "llvm.mips.asub.u.b" => "__builtin_msa_asub_u_b",
-    "llvm.mips.asub.u.d" => "__builtin_msa_asub_u_d",
-    "llvm.mips.asub.u.h" => "__builtin_msa_asub_u_h",
-    "llvm.mips.asub.u.w" => "__builtin_msa_asub_u_w",
-    "llvm.mips.ave.s.b" => "__builtin_msa_ave_s_b",
-    "llvm.mips.ave.s.d" => "__builtin_msa_ave_s_d",
-    "llvm.mips.ave.s.h" => "__builtin_msa_ave_s_h",
-    "llvm.mips.ave.s.w" => "__builtin_msa_ave_s_w",
-    "llvm.mips.ave.u.b" => "__builtin_msa_ave_u_b",
-    "llvm.mips.ave.u.d" => "__builtin_msa_ave_u_d",
-    "llvm.mips.ave.u.h" => "__builtin_msa_ave_u_h",
-    "llvm.mips.ave.u.w" => "__builtin_msa_ave_u_w",
-    "llvm.mips.aver.s.b" => "__builtin_msa_aver_s_b",
-    "llvm.mips.aver.s.d" => "__builtin_msa_aver_s_d",
-    "llvm.mips.aver.s.h" => "__builtin_msa_aver_s_h",
-    "llvm.mips.aver.s.w" => "__builtin_msa_aver_s_w",
-    "llvm.mips.aver.u.b" => "__builtin_msa_aver_u_b",
-    "llvm.mips.aver.u.d" => "__builtin_msa_aver_u_d",
-    "llvm.mips.aver.u.h" => "__builtin_msa_aver_u_h",
-    "llvm.mips.aver.u.w" => "__builtin_msa_aver_u_w",
-    "llvm.mips.balign" => "__builtin_mips_balign",
-    "llvm.mips.bclr.b" => "__builtin_msa_bclr_b",
-    "llvm.mips.bclr.d" => "__builtin_msa_bclr_d",
-    "llvm.mips.bclr.h" => "__builtin_msa_bclr_h",
-    "llvm.mips.bclr.w" => "__builtin_msa_bclr_w",
-    "llvm.mips.bclri.b" => "__builtin_msa_bclri_b",
-    "llvm.mips.bclri.d" => "__builtin_msa_bclri_d",
-    "llvm.mips.bclri.h" => "__builtin_msa_bclri_h",
-    "llvm.mips.bclri.w" => "__builtin_msa_bclri_w",
-    "llvm.mips.binsl.b" => "__builtin_msa_binsl_b",
-    "llvm.mips.binsl.d" => "__builtin_msa_binsl_d",
-    "llvm.mips.binsl.h" => "__builtin_msa_binsl_h",
-    "llvm.mips.binsl.w" => "__builtin_msa_binsl_w",
-    "llvm.mips.binsli.b" => "__builtin_msa_binsli_b",
-    "llvm.mips.binsli.d" => "__builtin_msa_binsli_d",
-    "llvm.mips.binsli.h" => "__builtin_msa_binsli_h",
-    "llvm.mips.binsli.w" => "__builtin_msa_binsli_w",
-    "llvm.mips.binsr.b" => "__builtin_msa_binsr_b",
-    "llvm.mips.binsr.d" => "__builtin_msa_binsr_d",
-    "llvm.mips.binsr.h" => "__builtin_msa_binsr_h",
-    "llvm.mips.binsr.w" => "__builtin_msa_binsr_w",
-    "llvm.mips.binsri.b" => "__builtin_msa_binsri_b",
-    "llvm.mips.binsri.d" => "__builtin_msa_binsri_d",
-    "llvm.mips.binsri.h" => "__builtin_msa_binsri_h",
-    "llvm.mips.binsri.w" => "__builtin_msa_binsri_w",
-    "llvm.mips.bitrev" => "__builtin_mips_bitrev",
-    "llvm.mips.bmnz.v" => "__builtin_msa_bmnz_v",
-    "llvm.mips.bmnzi.b" => "__builtin_msa_bmnzi_b",
-    "llvm.mips.bmz.v" => "__builtin_msa_bmz_v",
-    "llvm.mips.bmzi.b" => "__builtin_msa_bmzi_b",
-    "llvm.mips.bneg.b" => "__builtin_msa_bneg_b",
-    "llvm.mips.bneg.d" => "__builtin_msa_bneg_d",
-    "llvm.mips.bneg.h" => "__builtin_msa_bneg_h",
-    "llvm.mips.bneg.w" => "__builtin_msa_bneg_w",
-    "llvm.mips.bnegi.b" => "__builtin_msa_bnegi_b",
-    "llvm.mips.bnegi.d" => "__builtin_msa_bnegi_d",
-    "llvm.mips.bnegi.h" => "__builtin_msa_bnegi_h",
-    "llvm.mips.bnegi.w" => "__builtin_msa_bnegi_w",
-    "llvm.mips.bnz.b" => "__builtin_msa_bnz_b",
-    "llvm.mips.bnz.d" => "__builtin_msa_bnz_d",
-    "llvm.mips.bnz.h" => "__builtin_msa_bnz_h",
-    "llvm.mips.bnz.v" => "__builtin_msa_bnz_v",
-    "llvm.mips.bnz.w" => "__builtin_msa_bnz_w",
-    "llvm.mips.bposge32" => "__builtin_mips_bposge32",
-    "llvm.mips.bsel.v" => "__builtin_msa_bsel_v",
-    "llvm.mips.bseli.b" => "__builtin_msa_bseli_b",
-    "llvm.mips.bset.b" => "__builtin_msa_bset_b",
-    "llvm.mips.bset.d" => "__builtin_msa_bset_d",
-    "llvm.mips.bset.h" => "__builtin_msa_bset_h",
-    "llvm.mips.bset.w" => "__builtin_msa_bset_w",
-    "llvm.mips.bseti.b" => "__builtin_msa_bseti_b",
-    "llvm.mips.bseti.d" => "__builtin_msa_bseti_d",
-    "llvm.mips.bseti.h" => "__builtin_msa_bseti_h",
-    "llvm.mips.bseti.w" => "__builtin_msa_bseti_w",
-    "llvm.mips.bz.b" => "__builtin_msa_bz_b",
-    "llvm.mips.bz.d" => "__builtin_msa_bz_d",
-    "llvm.mips.bz.h" => "__builtin_msa_bz_h",
-    "llvm.mips.bz.v" => "__builtin_msa_bz_v",
-    "llvm.mips.bz.w" => "__builtin_msa_bz_w",
-    "llvm.mips.ceq.b" => "__builtin_msa_ceq_b",
-    "llvm.mips.ceq.d" => "__builtin_msa_ceq_d",
-    "llvm.mips.ceq.h" => "__builtin_msa_ceq_h",
-    "llvm.mips.ceq.w" => "__builtin_msa_ceq_w",
-    "llvm.mips.ceqi.b" => "__builtin_msa_ceqi_b",
-    "llvm.mips.ceqi.d" => "__builtin_msa_ceqi_d",
-    "llvm.mips.ceqi.h" => "__builtin_msa_ceqi_h",
-    "llvm.mips.ceqi.w" => "__builtin_msa_ceqi_w",
-    "llvm.mips.cfcmsa" => "__builtin_msa_cfcmsa",
-    "llvm.mips.cle.s.b" => "__builtin_msa_cle_s_b",
-    "llvm.mips.cle.s.d" => "__builtin_msa_cle_s_d",
-    "llvm.mips.cle.s.h" => "__builtin_msa_cle_s_h",
-    "llvm.mips.cle.s.w" => "__builtin_msa_cle_s_w",
-    "llvm.mips.cle.u.b" => "__builtin_msa_cle_u_b",
-    "llvm.mips.cle.u.d" => "__builtin_msa_cle_u_d",
-    "llvm.mips.cle.u.h" => "__builtin_msa_cle_u_h",
-    "llvm.mips.cle.u.w" => "__builtin_msa_cle_u_w",
-    "llvm.mips.clei.s.b" => "__builtin_msa_clei_s_b",
-    "llvm.mips.clei.s.d" => "__builtin_msa_clei_s_d",
-    "llvm.mips.clei.s.h" => "__builtin_msa_clei_s_h",
-    "llvm.mips.clei.s.w" => "__builtin_msa_clei_s_w",
-    "llvm.mips.clei.u.b" => "__builtin_msa_clei_u_b",
-    "llvm.mips.clei.u.d" => "__builtin_msa_clei_u_d",
-    "llvm.mips.clei.u.h" => "__builtin_msa_clei_u_h",
-    "llvm.mips.clei.u.w" => "__builtin_msa_clei_u_w",
-    "llvm.mips.clt.s.b" => "__builtin_msa_clt_s_b",
-    "llvm.mips.clt.s.d" => "__builtin_msa_clt_s_d",
-    "llvm.mips.clt.s.h" => "__builtin_msa_clt_s_h",
-    "llvm.mips.clt.s.w" => "__builtin_msa_clt_s_w",
-    "llvm.mips.clt.u.b" => "__builtin_msa_clt_u_b",
-    "llvm.mips.clt.u.d" => "__builtin_msa_clt_u_d",
-    "llvm.mips.clt.u.h" => "__builtin_msa_clt_u_h",
-    "llvm.mips.clt.u.w" => "__builtin_msa_clt_u_w",
-    "llvm.mips.clti.s.b" => "__builtin_msa_clti_s_b",
-    "llvm.mips.clti.s.d" => "__builtin_msa_clti_s_d",
-    "llvm.mips.clti.s.h" => "__builtin_msa_clti_s_h",
-    "llvm.mips.clti.s.w" => "__builtin_msa_clti_s_w",
-    "llvm.mips.clti.u.b" => "__builtin_msa_clti_u_b",
-    "llvm.mips.clti.u.d" => "__builtin_msa_clti_u_d",
-    "llvm.mips.clti.u.h" => "__builtin_msa_clti_u_h",
-    "llvm.mips.clti.u.w" => "__builtin_msa_clti_u_w",
-    "llvm.mips.cmpgdu.eq.qb" => "__builtin_mips_cmpgdu_eq_qb",
-    "llvm.mips.cmpgdu.le.qb" => "__builtin_mips_cmpgdu_le_qb",
-    "llvm.mips.cmpgdu.lt.qb" => "__builtin_mips_cmpgdu_lt_qb",
-    "llvm.mips.cmpgu.eq.qb" => "__builtin_mips_cmpgu_eq_qb",
-    "llvm.mips.cmpgu.le.qb" => "__builtin_mips_cmpgu_le_qb",
-    "llvm.mips.cmpgu.lt.qb" => "__builtin_mips_cmpgu_lt_qb",
-    "llvm.mips.cmpu.eq.qb" => "__builtin_mips_cmpu_eq_qb",
-    "llvm.mips.cmpu.le.qb" => "__builtin_mips_cmpu_le_qb",
-    "llvm.mips.cmpu.lt.qb" => "__builtin_mips_cmpu_lt_qb",
-    "llvm.mips.copy.s.b" => "__builtin_msa_copy_s_b",
-    "llvm.mips.copy.s.d" => "__builtin_msa_copy_s_d",
-    "llvm.mips.copy.s.h" => "__builtin_msa_copy_s_h",
-    "llvm.mips.copy.s.w" => "__builtin_msa_copy_s_w",
-    "llvm.mips.copy.u.b" => "__builtin_msa_copy_u_b",
-    "llvm.mips.copy.u.d" => "__builtin_msa_copy_u_d",
-    "llvm.mips.copy.u.h" => "__builtin_msa_copy_u_h",
-    "llvm.mips.copy.u.w" => "__builtin_msa_copy_u_w",
-    "llvm.mips.ctcmsa" => "__builtin_msa_ctcmsa",
-    "llvm.mips.div.s.b" => "__builtin_msa_div_s_b",
-    "llvm.mips.div.s.d" => "__builtin_msa_div_s_d",
-    "llvm.mips.div.s.h" => "__builtin_msa_div_s_h",
-    "llvm.mips.div.s.w" => "__builtin_msa_div_s_w",
-    "llvm.mips.div.u.b" => "__builtin_msa_div_u_b",
-    "llvm.mips.div.u.d" => "__builtin_msa_div_u_d",
-    "llvm.mips.div.u.h" => "__builtin_msa_div_u_h",
-    "llvm.mips.div.u.w" => "__builtin_msa_div_u_w",
-    "llvm.mips.dlsa" => "__builtin_mips_dlsa",
-    "llvm.mips.dotp.s.d" => "__builtin_msa_dotp_s_d",
-    "llvm.mips.dotp.s.h" => "__builtin_msa_dotp_s_h",
-    "llvm.mips.dotp.s.w" => "__builtin_msa_dotp_s_w",
-    "llvm.mips.dotp.u.d" => "__builtin_msa_dotp_u_d",
-    "llvm.mips.dotp.u.h" => "__builtin_msa_dotp_u_h",
-    "llvm.mips.dotp.u.w" => "__builtin_msa_dotp_u_w",
-    "llvm.mips.dpa.w.ph" => "__builtin_mips_dpa_w_ph",
-    "llvm.mips.dpadd.s.d" => "__builtin_msa_dpadd_s_d",
-    "llvm.mips.dpadd.s.h" => "__builtin_msa_dpadd_s_h",
-    "llvm.mips.dpadd.s.w" => "__builtin_msa_dpadd_s_w",
-    "llvm.mips.dpadd.u.d" => "__builtin_msa_dpadd_u_d",
-    "llvm.mips.dpadd.u.h" => "__builtin_msa_dpadd_u_h",
-    "llvm.mips.dpadd.u.w" => "__builtin_msa_dpadd_u_w",
-    "llvm.mips.dpau.h.qbl" => "__builtin_mips_dpau_h_qbl",
-    "llvm.mips.dpau.h.qbr" => "__builtin_mips_dpau_h_qbr",
-    "llvm.mips.dpax.w.ph" => "__builtin_mips_dpax_w_ph",
-    "llvm.mips.dps.w.ph" => "__builtin_mips_dps_w_ph",
-    "llvm.mips.dpsu.h.qbl" => "__builtin_mips_dpsu_h_qbl",
-    "llvm.mips.dpsu.h.qbr" => "__builtin_mips_dpsu_h_qbr",
-    "llvm.mips.dpsub.s.d" => "__builtin_msa_dpsub_s_d",
-    "llvm.mips.dpsub.s.h" => "__builtin_msa_dpsub_s_h",
-    "llvm.mips.dpsub.s.w" => "__builtin_msa_dpsub_s_w",
-    "llvm.mips.dpsub.u.d" => "__builtin_msa_dpsub_u_d",
-    "llvm.mips.dpsub.u.h" => "__builtin_msa_dpsub_u_h",
-    "llvm.mips.dpsub.u.w" => "__builtin_msa_dpsub_u_w",
-    "llvm.mips.dpsx.w.ph" => "__builtin_mips_dpsx_w_ph",
-    "llvm.mips.extp" => "__builtin_mips_extp",
-    "llvm.mips.extpdp" => "__builtin_mips_extpdp",
-    "llvm.mips.extr.r.w" => "__builtin_mips_extr_r_w",
-    "llvm.mips.extr.rs.w" => "__builtin_mips_extr_rs_w",
-    "llvm.mips.extr.s.h" => "__builtin_mips_extr_s_h",
-    "llvm.mips.extr.w" => "__builtin_mips_extr_w",
-    "llvm.mips.fadd.d" => "__builtin_msa_fadd_d",
-    "llvm.mips.fadd.w" => "__builtin_msa_fadd_w",
-    "llvm.mips.fcaf.d" => "__builtin_msa_fcaf_d",
-    "llvm.mips.fcaf.w" => "__builtin_msa_fcaf_w",
-    "llvm.mips.fceq.d" => "__builtin_msa_fceq_d",
-    "llvm.mips.fceq.w" => "__builtin_msa_fceq_w",
-    "llvm.mips.fclass.d" => "__builtin_msa_fclass_d",
-    "llvm.mips.fclass.w" => "__builtin_msa_fclass_w",
-    "llvm.mips.fcle.d" => "__builtin_msa_fcle_d",
-    "llvm.mips.fcle.w" => "__builtin_msa_fcle_w",
-    "llvm.mips.fclt.d" => "__builtin_msa_fclt_d",
-    "llvm.mips.fclt.w" => "__builtin_msa_fclt_w",
-    "llvm.mips.fcne.d" => "__builtin_msa_fcne_d",
-    "llvm.mips.fcne.w" => "__builtin_msa_fcne_w",
-    "llvm.mips.fcor.d" => "__builtin_msa_fcor_d",
-    "llvm.mips.fcor.w" => "__builtin_msa_fcor_w",
-    "llvm.mips.fcueq.d" => "__builtin_msa_fcueq_d",
-    "llvm.mips.fcueq.w" => "__builtin_msa_fcueq_w",
-    "llvm.mips.fcule.d" => "__builtin_msa_fcule_d",
-    "llvm.mips.fcule.w" => "__builtin_msa_fcule_w",
-    "llvm.mips.fcult.d" => "__builtin_msa_fcult_d",
-    "llvm.mips.fcult.w" => "__builtin_msa_fcult_w",
-    "llvm.mips.fcun.d" => "__builtin_msa_fcun_d",
-    "llvm.mips.fcun.w" => "__builtin_msa_fcun_w",
-    "llvm.mips.fcune.d" => "__builtin_msa_fcune_d",
-    "llvm.mips.fcune.w" => "__builtin_msa_fcune_w",
-    "llvm.mips.fdiv.d" => "__builtin_msa_fdiv_d",
-    "llvm.mips.fdiv.w" => "__builtin_msa_fdiv_w",
-    "llvm.mips.fexdo.w" => "__builtin_msa_fexdo_w",
-    "llvm.mips.fexp2.d" => "__builtin_msa_fexp2_d",
-    "llvm.mips.fexp2.w" => "__builtin_msa_fexp2_w",
-    "llvm.mips.fexupl.d" => "__builtin_msa_fexupl_d",
-    "llvm.mips.fexupr.d" => "__builtin_msa_fexupr_d",
-    "llvm.mips.ffint.s.d" => "__builtin_msa_ffint_s_d",
-    "llvm.mips.ffint.s.w" => "__builtin_msa_ffint_s_w",
-    "llvm.mips.ffint.u.d" => "__builtin_msa_ffint_u_d",
-    "llvm.mips.ffint.u.w" => "__builtin_msa_ffint_u_w",
-    "llvm.mips.ffql.d" => "__builtin_msa_ffql_d",
-    "llvm.mips.ffql.w" => "__builtin_msa_ffql_w",
-    "llvm.mips.ffqr.d" => "__builtin_msa_ffqr_d",
-    "llvm.mips.ffqr.w" => "__builtin_msa_ffqr_w",
-    "llvm.mips.fill.b" => "__builtin_msa_fill_b",
-    "llvm.mips.fill.d" => "__builtin_msa_fill_d",
-    "llvm.mips.fill.h" => "__builtin_msa_fill_h",
-    "llvm.mips.fill.w" => "__builtin_msa_fill_w",
-    "llvm.mips.flog2.d" => "__builtin_msa_flog2_d",
-    "llvm.mips.flog2.w" => "__builtin_msa_flog2_w",
-    "llvm.mips.fmadd.d" => "__builtin_msa_fmadd_d",
-    "llvm.mips.fmadd.w" => "__builtin_msa_fmadd_w",
-    "llvm.mips.fmax.a.d" => "__builtin_msa_fmax_a_d",
-    "llvm.mips.fmax.a.w" => "__builtin_msa_fmax_a_w",
-    "llvm.mips.fmax.d" => "__builtin_msa_fmax_d",
-    "llvm.mips.fmax.w" => "__builtin_msa_fmax_w",
-    "llvm.mips.fmin.a.d" => "__builtin_msa_fmin_a_d",
-    "llvm.mips.fmin.a.w" => "__builtin_msa_fmin_a_w",
-    "llvm.mips.fmin.d" => "__builtin_msa_fmin_d",
-    "llvm.mips.fmin.w" => "__builtin_msa_fmin_w",
-    "llvm.mips.fmsub.d" => "__builtin_msa_fmsub_d",
-    "llvm.mips.fmsub.w" => "__builtin_msa_fmsub_w",
-    "llvm.mips.fmul.d" => "__builtin_msa_fmul_d",
-    "llvm.mips.fmul.w" => "__builtin_msa_fmul_w",
-    "llvm.mips.frcp.d" => "__builtin_msa_frcp_d",
-    "llvm.mips.frcp.w" => "__builtin_msa_frcp_w",
-    "llvm.mips.frint.d" => "__builtin_msa_frint_d",
-    "llvm.mips.frint.w" => "__builtin_msa_frint_w",
-    "llvm.mips.frsqrt.d" => "__builtin_msa_frsqrt_d",
-    "llvm.mips.frsqrt.w" => "__builtin_msa_frsqrt_w",
-    "llvm.mips.fsaf.d" => "__builtin_msa_fsaf_d",
-    "llvm.mips.fsaf.w" => "__builtin_msa_fsaf_w",
-    "llvm.mips.fseq.d" => "__builtin_msa_fseq_d",
-    "llvm.mips.fseq.w" => "__builtin_msa_fseq_w",
-    "llvm.mips.fsle.d" => "__builtin_msa_fsle_d",
-    "llvm.mips.fsle.w" => "__builtin_msa_fsle_w",
-    "llvm.mips.fslt.d" => "__builtin_msa_fslt_d",
-    "llvm.mips.fslt.w" => "__builtin_msa_fslt_w",
-    "llvm.mips.fsne.d" => "__builtin_msa_fsne_d",
-    "llvm.mips.fsne.w" => "__builtin_msa_fsne_w",
-    "llvm.mips.fsor.d" => "__builtin_msa_fsor_d",
-    "llvm.mips.fsor.w" => "__builtin_msa_fsor_w",
-    "llvm.mips.fsqrt.d" => "__builtin_msa_fsqrt_d",
-    "llvm.mips.fsqrt.w" => "__builtin_msa_fsqrt_w",
-    "llvm.mips.fsub.d" => "__builtin_msa_fsub_d",
-    "llvm.mips.fsub.w" => "__builtin_msa_fsub_w",
-    "llvm.mips.fsueq.d" => "__builtin_msa_fsueq_d",
-    "llvm.mips.fsueq.w" => "__builtin_msa_fsueq_w",
-    "llvm.mips.fsule.d" => "__builtin_msa_fsule_d",
-    "llvm.mips.fsule.w" => "__builtin_msa_fsule_w",
-    "llvm.mips.fsult.d" => "__builtin_msa_fsult_d",
-    "llvm.mips.fsult.w" => "__builtin_msa_fsult_w",
-    "llvm.mips.fsun.d" => "__builtin_msa_fsun_d",
-    "llvm.mips.fsun.w" => "__builtin_msa_fsun_w",
-    "llvm.mips.fsune.d" => "__builtin_msa_fsune_d",
-    "llvm.mips.fsune.w" => "__builtin_msa_fsune_w",
-    "llvm.mips.ftint.s.d" => "__builtin_msa_ftint_s_d",
-    "llvm.mips.ftint.s.w" => "__builtin_msa_ftint_s_w",
-    "llvm.mips.ftint.u.d" => "__builtin_msa_ftint_u_d",
-    "llvm.mips.ftint.u.w" => "__builtin_msa_ftint_u_w",
-    "llvm.mips.ftq.h" => "__builtin_msa_ftq_h",
-    "llvm.mips.ftq.w" => "__builtin_msa_ftq_w",
-    "llvm.mips.ftrunc.s.d" => "__builtin_msa_ftrunc_s_d",
-    "llvm.mips.ftrunc.s.w" => "__builtin_msa_ftrunc_s_w",
-    "llvm.mips.ftrunc.u.d" => "__builtin_msa_ftrunc_u_d",
-    "llvm.mips.ftrunc.u.w" => "__builtin_msa_ftrunc_u_w",
-    "llvm.mips.hadd.s.d" => "__builtin_msa_hadd_s_d",
-    "llvm.mips.hadd.s.h" => "__builtin_msa_hadd_s_h",
-    "llvm.mips.hadd.s.w" => "__builtin_msa_hadd_s_w",
-    "llvm.mips.hadd.u.d" => "__builtin_msa_hadd_u_d",
-    "llvm.mips.hadd.u.h" => "__builtin_msa_hadd_u_h",
-    "llvm.mips.hadd.u.w" => "__builtin_msa_hadd_u_w",
-    "llvm.mips.hsub.s.d" => "__builtin_msa_hsub_s_d",
-    "llvm.mips.hsub.s.h" => "__builtin_msa_hsub_s_h",
-    "llvm.mips.hsub.s.w" => "__builtin_msa_hsub_s_w",
-    "llvm.mips.hsub.u.d" => "__builtin_msa_hsub_u_d",
-    "llvm.mips.hsub.u.h" => "__builtin_msa_hsub_u_h",
-    "llvm.mips.hsub.u.w" => "__builtin_msa_hsub_u_w",
-    "llvm.mips.ilvev.b" => "__builtin_msa_ilvev_b",
-    "llvm.mips.ilvev.d" => "__builtin_msa_ilvev_d",
-    "llvm.mips.ilvev.h" => "__builtin_msa_ilvev_h",
-    "llvm.mips.ilvev.w" => "__builtin_msa_ilvev_w",
-    "llvm.mips.ilvl.b" => "__builtin_msa_ilvl_b",
-    "llvm.mips.ilvl.d" => "__builtin_msa_ilvl_d",
-    "llvm.mips.ilvl.h" => "__builtin_msa_ilvl_h",
-    "llvm.mips.ilvl.w" => "__builtin_msa_ilvl_w",
-    "llvm.mips.ilvod.b" => "__builtin_msa_ilvod_b",
-    "llvm.mips.ilvod.d" => "__builtin_msa_ilvod_d",
-    "llvm.mips.ilvod.h" => "__builtin_msa_ilvod_h",
-    "llvm.mips.ilvod.w" => "__builtin_msa_ilvod_w",
-    "llvm.mips.ilvr.b" => "__builtin_msa_ilvr_b",
-    "llvm.mips.ilvr.d" => "__builtin_msa_ilvr_d",
-    "llvm.mips.ilvr.h" => "__builtin_msa_ilvr_h",
-    "llvm.mips.ilvr.w" => "__builtin_msa_ilvr_w",
-    "llvm.mips.insert.b" => "__builtin_msa_insert_b",
-    "llvm.mips.insert.d" => "__builtin_msa_insert_d",
-    "llvm.mips.insert.h" => "__builtin_msa_insert_h",
-    "llvm.mips.insert.w" => "__builtin_msa_insert_w",
-    "llvm.mips.insv" => "__builtin_mips_insv",
-    "llvm.mips.insve.b" => "__builtin_msa_insve_b",
-    "llvm.mips.insve.d" => "__builtin_msa_insve_d",
-    "llvm.mips.insve.h" => "__builtin_msa_insve_h",
-    "llvm.mips.insve.w" => "__builtin_msa_insve_w",
-    "llvm.mips.lbux" => "__builtin_mips_lbux",
-    "llvm.mips.ld.b" => "__builtin_msa_ld_b",
-    "llvm.mips.ld.d" => "__builtin_msa_ld_d",
-    "llvm.mips.ld.h" => "__builtin_msa_ld_h",
-    "llvm.mips.ld.w" => "__builtin_msa_ld_w",
-    "llvm.mips.ldi.b" => "__builtin_msa_ldi_b",
-    "llvm.mips.ldi.d" => "__builtin_msa_ldi_d",
-    "llvm.mips.ldi.h" => "__builtin_msa_ldi_h",
-    "llvm.mips.ldi.w" => "__builtin_msa_ldi_w",
-    "llvm.mips.lhx" => "__builtin_mips_lhx",
-    "llvm.mips.lsa" => "__builtin_mips_lsa",
-    "llvm.mips.lwx" => "__builtin_mips_lwx",
-    "llvm.mips.madd" => "__builtin_mips_madd",
-    "llvm.mips.madd.q.h" => "__builtin_msa_madd_q_h",
-    "llvm.mips.madd.q.w" => "__builtin_msa_madd_q_w",
-    "llvm.mips.maddr.q.h" => "__builtin_msa_maddr_q_h",
-    "llvm.mips.maddr.q.w" => "__builtin_msa_maddr_q_w",
-    "llvm.mips.maddu" => "__builtin_mips_maddu",
-    "llvm.mips.maddv.b" => "__builtin_msa_maddv_b",
-    "llvm.mips.maddv.d" => "__builtin_msa_maddv_d",
-    "llvm.mips.maddv.h" => "__builtin_msa_maddv_h",
-    "llvm.mips.maddv.w" => "__builtin_msa_maddv_w",
-    "llvm.mips.max.a.b" => "__builtin_msa_max_a_b",
-    "llvm.mips.max.a.d" => "__builtin_msa_max_a_d",
-    "llvm.mips.max.a.h" => "__builtin_msa_max_a_h",
-    "llvm.mips.max.a.w" => "__builtin_msa_max_a_w",
-    "llvm.mips.max.s.b" => "__builtin_msa_max_s_b",
-    "llvm.mips.max.s.d" => "__builtin_msa_max_s_d",
-    "llvm.mips.max.s.h" => "__builtin_msa_max_s_h",
-    "llvm.mips.max.s.w" => "__builtin_msa_max_s_w",
-    "llvm.mips.max.u.b" => "__builtin_msa_max_u_b",
-    "llvm.mips.max.u.d" => "__builtin_msa_max_u_d",
-    "llvm.mips.max.u.h" => "__builtin_msa_max_u_h",
-    "llvm.mips.max.u.w" => "__builtin_msa_max_u_w",
-    "llvm.mips.maxi.s.b" => "__builtin_msa_maxi_s_b",
-    "llvm.mips.maxi.s.d" => "__builtin_msa_maxi_s_d",
-    "llvm.mips.maxi.s.h" => "__builtin_msa_maxi_s_h",
-    "llvm.mips.maxi.s.w" => "__builtin_msa_maxi_s_w",
-    "llvm.mips.maxi.u.b" => "__builtin_msa_maxi_u_b",
-    "llvm.mips.maxi.u.d" => "__builtin_msa_maxi_u_d",
-    "llvm.mips.maxi.u.h" => "__builtin_msa_maxi_u_h",
-    "llvm.mips.maxi.u.w" => "__builtin_msa_maxi_u_w",
-    "llvm.mips.min.a.b" => "__builtin_msa_min_a_b",
-    "llvm.mips.min.a.d" => "__builtin_msa_min_a_d",
-    "llvm.mips.min.a.h" => "__builtin_msa_min_a_h",
-    "llvm.mips.min.a.w" => "__builtin_msa_min_a_w",
-    "llvm.mips.min.s.b" => "__builtin_msa_min_s_b",
-    "llvm.mips.min.s.d" => "__builtin_msa_min_s_d",
-    "llvm.mips.min.s.h" => "__builtin_msa_min_s_h",
-    "llvm.mips.min.s.w" => "__builtin_msa_min_s_w",
-    "llvm.mips.min.u.b" => "__builtin_msa_min_u_b",
-    "llvm.mips.min.u.d" => "__builtin_msa_min_u_d",
-    "llvm.mips.min.u.h" => "__builtin_msa_min_u_h",
-    "llvm.mips.min.u.w" => "__builtin_msa_min_u_w",
-    "llvm.mips.mini.s.b" => "__builtin_msa_mini_s_b",
-    "llvm.mips.mini.s.d" => "__builtin_msa_mini_s_d",
-    "llvm.mips.mini.s.h" => "__builtin_msa_mini_s_h",
-    "llvm.mips.mini.s.w" => "__builtin_msa_mini_s_w",
-    "llvm.mips.mini.u.b" => "__builtin_msa_mini_u_b",
-    "llvm.mips.mini.u.d" => "__builtin_msa_mini_u_d",
-    "llvm.mips.mini.u.h" => "__builtin_msa_mini_u_h",
-    "llvm.mips.mini.u.w" => "__builtin_msa_mini_u_w",
-    "llvm.mips.mod.s.b" => "__builtin_msa_mod_s_b",
-    "llvm.mips.mod.s.d" => "__builtin_msa_mod_s_d",
-    "llvm.mips.mod.s.h" => "__builtin_msa_mod_s_h",
-    "llvm.mips.mod.s.w" => "__builtin_msa_mod_s_w",
-    "llvm.mips.mod.u.b" => "__builtin_msa_mod_u_b",
-    "llvm.mips.mod.u.d" => "__builtin_msa_mod_u_d",
-    "llvm.mips.mod.u.h" => "__builtin_msa_mod_u_h",
-    "llvm.mips.mod.u.w" => "__builtin_msa_mod_u_w",
-    "llvm.mips.modsub" => "__builtin_mips_modsub",
-    "llvm.mips.move.v" => "__builtin_msa_move_v",
-    "llvm.mips.msub" => "__builtin_mips_msub",
-    "llvm.mips.msub.q.h" => "__builtin_msa_msub_q_h",
-    "llvm.mips.msub.q.w" => "__builtin_msa_msub_q_w",
-    "llvm.mips.msubr.q.h" => "__builtin_msa_msubr_q_h",
-    "llvm.mips.msubr.q.w" => "__builtin_msa_msubr_q_w",
-    "llvm.mips.msubu" => "__builtin_mips_msubu",
-    "llvm.mips.msubv.b" => "__builtin_msa_msubv_b",
-    "llvm.mips.msubv.d" => "__builtin_msa_msubv_d",
-    "llvm.mips.msubv.h" => "__builtin_msa_msubv_h",
-    "llvm.mips.msubv.w" => "__builtin_msa_msubv_w",
-    "llvm.mips.mthlip" => "__builtin_mips_mthlip",
-    "llvm.mips.mul.ph" => "__builtin_mips_mul_ph",
-    "llvm.mips.mul.q.h" => "__builtin_msa_mul_q_h",
-    "llvm.mips.mul.q.w" => "__builtin_msa_mul_q_w",
-    "llvm.mips.mul.s.ph" => "__builtin_mips_mul_s_ph",
-    "llvm.mips.mulr.q.h" => "__builtin_msa_mulr_q_h",
-    "llvm.mips.mulr.q.w" => "__builtin_msa_mulr_q_w",
-    "llvm.mips.mulsa.w.ph" => "__builtin_mips_mulsa_w_ph",
-    "llvm.mips.mult" => "__builtin_mips_mult",
-    "llvm.mips.multu" => "__builtin_mips_multu",
-    "llvm.mips.mulv.b" => "__builtin_msa_mulv_b",
-    "llvm.mips.mulv.d" => "__builtin_msa_mulv_d",
-    "llvm.mips.mulv.h" => "__builtin_msa_mulv_h",
-    "llvm.mips.mulv.w" => "__builtin_msa_mulv_w",
-    "llvm.mips.nloc.b" => "__builtin_msa_nloc_b",
-    "llvm.mips.nloc.d" => "__builtin_msa_nloc_d",
-    "llvm.mips.nloc.h" => "__builtin_msa_nloc_h",
-    "llvm.mips.nloc.w" => "__builtin_msa_nloc_w",
-    "llvm.mips.nlzc.b" => "__builtin_msa_nlzc_b",
-    "llvm.mips.nlzc.d" => "__builtin_msa_nlzc_d",
-    "llvm.mips.nlzc.h" => "__builtin_msa_nlzc_h",
-    "llvm.mips.nlzc.w" => "__builtin_msa_nlzc_w",
-    "llvm.mips.nor.v" => "__builtin_msa_nor_v",
-    "llvm.mips.nori.b" => "__builtin_msa_nori_b",
-    "llvm.mips.or.v" => "__builtin_msa_or_v",
-    "llvm.mips.ori.b" => "__builtin_msa_ori_b",
-    "llvm.mips.pckev.b" => "__builtin_msa_pckev_b",
-    "llvm.mips.pckev.d" => "__builtin_msa_pckev_d",
-    "llvm.mips.pckev.h" => "__builtin_msa_pckev_h",
-    "llvm.mips.pckev.w" => "__builtin_msa_pckev_w",
-    "llvm.mips.pckod.b" => "__builtin_msa_pckod_b",
-    "llvm.mips.pckod.d" => "__builtin_msa_pckod_d",
-    "llvm.mips.pckod.h" => "__builtin_msa_pckod_h",
-    "llvm.mips.pckod.w" => "__builtin_msa_pckod_w",
-    "llvm.mips.pcnt.b" => "__builtin_msa_pcnt_b",
-    "llvm.mips.pcnt.d" => "__builtin_msa_pcnt_d",
-    "llvm.mips.pcnt.h" => "__builtin_msa_pcnt_h",
-    "llvm.mips.pcnt.w" => "__builtin_msa_pcnt_w",
-    "llvm.mips.pick.qb" => "__builtin_mips_pick_qb",
-    "llvm.mips.precr.qb.ph" => "__builtin_mips_precr_qb_ph",
-    "llvm.mips.precr.sra.ph.w" => "__builtin_mips_precr_sra_ph_w",
-    "llvm.mips.precr.sra.r.ph.w" => "__builtin_mips_precr_sra_r_ph_w",
-    "llvm.mips.prepend" => "__builtin_mips_prepend",
-    "llvm.mips.raddu.w.qb" => "__builtin_mips_raddu_w_qb",
-    "llvm.mips.rddsp" => "__builtin_mips_rddsp",
-    "llvm.mips.repl.qb" => "__builtin_mips_repl_qb",
-    "llvm.mips.sat.s.b" => "__builtin_msa_sat_s_b",
-    "llvm.mips.sat.s.d" => "__builtin_msa_sat_s_d",
-    "llvm.mips.sat.s.h" => "__builtin_msa_sat_s_h",
-    "llvm.mips.sat.s.w" => "__builtin_msa_sat_s_w",
-    "llvm.mips.sat.u.b" => "__builtin_msa_sat_u_b",
-    "llvm.mips.sat.u.d" => "__builtin_msa_sat_u_d",
-    "llvm.mips.sat.u.h" => "__builtin_msa_sat_u_h",
-    "llvm.mips.sat.u.w" => "__builtin_msa_sat_u_w",
-    "llvm.mips.shf.b" => "__builtin_msa_shf_b",
-    "llvm.mips.shf.h" => "__builtin_msa_shf_h",
-    "llvm.mips.shf.w" => "__builtin_msa_shf_w",
-    "llvm.mips.shilo" => "__builtin_mips_shilo",
-    "llvm.mips.shll.qb" => "__builtin_mips_shll_qb",
-    "llvm.mips.shra.qb" => "__builtin_mips_shra_qb",
-    "llvm.mips.shra.r.qb" => "__builtin_mips_shra_r_qb",
-    "llvm.mips.shrl.ph" => "__builtin_mips_shrl_ph",
-    "llvm.mips.shrl.qb" => "__builtin_mips_shrl_qb",
-    "llvm.mips.sld.b" => "__builtin_msa_sld_b",
-    "llvm.mips.sld.d" => "__builtin_msa_sld_d",
-    "llvm.mips.sld.h" => "__builtin_msa_sld_h",
-    "llvm.mips.sld.w" => "__builtin_msa_sld_w",
-    "llvm.mips.sldi.b" => "__builtin_msa_sldi_b",
-    "llvm.mips.sldi.d" => "__builtin_msa_sldi_d",
-    "llvm.mips.sldi.h" => "__builtin_msa_sldi_h",
-    "llvm.mips.sldi.w" => "__builtin_msa_sldi_w",
-    "llvm.mips.sll.b" => "__builtin_msa_sll_b",
-    "llvm.mips.sll.d" => "__builtin_msa_sll_d",
-    "llvm.mips.sll.h" => "__builtin_msa_sll_h",
-    "llvm.mips.sll.w" => "__builtin_msa_sll_w",
-    "llvm.mips.slli.b" => "__builtin_msa_slli_b",
-    "llvm.mips.slli.d" => "__builtin_msa_slli_d",
-    "llvm.mips.slli.h" => "__builtin_msa_slli_h",
-    "llvm.mips.slli.w" => "__builtin_msa_slli_w",
-    "llvm.mips.splat.b" => "__builtin_msa_splat_b",
-    "llvm.mips.splat.d" => "__builtin_msa_splat_d",
-    "llvm.mips.splat.h" => "__builtin_msa_splat_h",
-    "llvm.mips.splat.w" => "__builtin_msa_splat_w",
-    "llvm.mips.splati.b" => "__builtin_msa_splati_b",
-    "llvm.mips.splati.d" => "__builtin_msa_splati_d",
-    "llvm.mips.splati.h" => "__builtin_msa_splati_h",
-    "llvm.mips.splati.w" => "__builtin_msa_splati_w",
-    "llvm.mips.sra.b" => "__builtin_msa_sra_b",
-    "llvm.mips.sra.d" => "__builtin_msa_sra_d",
-    "llvm.mips.sra.h" => "__builtin_msa_sra_h",
-    "llvm.mips.sra.w" => "__builtin_msa_sra_w",
-    "llvm.mips.srai.b" => "__builtin_msa_srai_b",
-    "llvm.mips.srai.d" => "__builtin_msa_srai_d",
-    "llvm.mips.srai.h" => "__builtin_msa_srai_h",
-    "llvm.mips.srai.w" => "__builtin_msa_srai_w",
-    "llvm.mips.srar.b" => "__builtin_msa_srar_b",
-    "llvm.mips.srar.d" => "__builtin_msa_srar_d",
-    "llvm.mips.srar.h" => "__builtin_msa_srar_h",
-    "llvm.mips.srar.w" => "__builtin_msa_srar_w",
-    "llvm.mips.srari.b" => "__builtin_msa_srari_b",
-    "llvm.mips.srari.d" => "__builtin_msa_srari_d",
-    "llvm.mips.srari.h" => "__builtin_msa_srari_h",
-    "llvm.mips.srari.w" => "__builtin_msa_srari_w",
-    "llvm.mips.srl.b" => "__builtin_msa_srl_b",
-    "llvm.mips.srl.d" => "__builtin_msa_srl_d",
-    "llvm.mips.srl.h" => "__builtin_msa_srl_h",
-    "llvm.mips.srl.w" => "__builtin_msa_srl_w",
-    "llvm.mips.srli.b" => "__builtin_msa_srli_b",
-    "llvm.mips.srli.d" => "__builtin_msa_srli_d",
-    "llvm.mips.srli.h" => "__builtin_msa_srli_h",
-    "llvm.mips.srli.w" => "__builtin_msa_srli_w",
-    "llvm.mips.srlr.b" => "__builtin_msa_srlr_b",
-    "llvm.mips.srlr.d" => "__builtin_msa_srlr_d",
-    "llvm.mips.srlr.h" => "__builtin_msa_srlr_h",
-    "llvm.mips.srlr.w" => "__builtin_msa_srlr_w",
-    "llvm.mips.srlri.b" => "__builtin_msa_srlri_b",
-    "llvm.mips.srlri.d" => "__builtin_msa_srlri_d",
-    "llvm.mips.srlri.h" => "__builtin_msa_srlri_h",
-    "llvm.mips.srlri.w" => "__builtin_msa_srlri_w",
-    "llvm.mips.st.b" => "__builtin_msa_st_b",
-    "llvm.mips.st.d" => "__builtin_msa_st_d",
-    "llvm.mips.st.h" => "__builtin_msa_st_h",
-    "llvm.mips.st.w" => "__builtin_msa_st_w",
-    "llvm.mips.subs.s.b" => "__builtin_msa_subs_s_b",
-    "llvm.mips.subs.s.d" => "__builtin_msa_subs_s_d",
-    "llvm.mips.subs.s.h" => "__builtin_msa_subs_s_h",
-    "llvm.mips.subs.s.w" => "__builtin_msa_subs_s_w",
-    "llvm.mips.subs.u.b" => "__builtin_msa_subs_u_b",
-    "llvm.mips.subs.u.d" => "__builtin_msa_subs_u_d",
-    "llvm.mips.subs.u.h" => "__builtin_msa_subs_u_h",
-    "llvm.mips.subs.u.w" => "__builtin_msa_subs_u_w",
-    "llvm.mips.subsus.u.b" => "__builtin_msa_subsus_u_b",
-    "llvm.mips.subsus.u.d" => "__builtin_msa_subsus_u_d",
-    "llvm.mips.subsus.u.h" => "__builtin_msa_subsus_u_h",
-    "llvm.mips.subsus.u.w" => "__builtin_msa_subsus_u_w",
-    "llvm.mips.subsuu.s.b" => "__builtin_msa_subsuu_s_b",
-    "llvm.mips.subsuu.s.d" => "__builtin_msa_subsuu_s_d",
-    "llvm.mips.subsuu.s.h" => "__builtin_msa_subsuu_s_h",
-    "llvm.mips.subsuu.s.w" => "__builtin_msa_subsuu_s_w",
-    "llvm.mips.subu.ph" => "__builtin_mips_subu_ph",
-    "llvm.mips.subu.qb" => "__builtin_mips_subu_qb",
-    "llvm.mips.subu.s.ph" => "__builtin_mips_subu_s_ph",
-    "llvm.mips.subu.s.qb" => "__builtin_mips_subu_s_qb",
-    "llvm.mips.subuh.qb" => "__builtin_mips_subuh_qb",
-    "llvm.mips.subuh.r.qb" => "__builtin_mips_subuh_r_qb",
-    "llvm.mips.subv.b" => "__builtin_msa_subv_b",
-    "llvm.mips.subv.d" => "__builtin_msa_subv_d",
-    "llvm.mips.subv.h" => "__builtin_msa_subv_h",
-    "llvm.mips.subv.w" => "__builtin_msa_subv_w",
-    "llvm.mips.subvi.b" => "__builtin_msa_subvi_b",
-    "llvm.mips.subvi.d" => "__builtin_msa_subvi_d",
-    "llvm.mips.subvi.h" => "__builtin_msa_subvi_h",
-    "llvm.mips.subvi.w" => "__builtin_msa_subvi_w",
-    "llvm.mips.vshf.b" => "__builtin_msa_vshf_b",
-    "llvm.mips.vshf.d" => "__builtin_msa_vshf_d",
-    "llvm.mips.vshf.h" => "__builtin_msa_vshf_h",
-    "llvm.mips.vshf.w" => "__builtin_msa_vshf_w",
-    "llvm.mips.wrdsp" => "__builtin_mips_wrdsp",
-    "llvm.mips.xor.v" => "__builtin_msa_xor_v",
-    "llvm.mips.xori.b" => "__builtin_msa_xori_b",
     // xcore
     "llvm.xcore.bitrev" => "__builtin_bitrev",
     "llvm.xcore.getid" => "__builtin_getid",
     "llvm.xcore.getps" => "__builtin_getps",
     "llvm.xcore.setps" => "__builtin_setps",
-    // ptx
-    "llvm.ptx.bar.sync" => "__builtin_ptx_bar_sync",
-    "llvm.ptx.read.clock" => "__builtin_ptx_read_clock",
-    "llvm.ptx.read.clock64" => "__builtin_ptx_read_clock64",
-    "llvm.ptx.read.gridid" => "__builtin_ptx_read_gridid",
-    "llvm.ptx.read.laneid" => "__builtin_ptx_read_laneid",
-    "llvm.ptx.read.lanemask.eq" => "__builtin_ptx_read_lanemask_eq",
-    "llvm.ptx.read.lanemask.ge" => "__builtin_ptx_read_lanemask_ge",
-    "llvm.ptx.read.lanemask.gt" => "__builtin_ptx_read_lanemask_gt",
-    "llvm.ptx.read.lanemask.le" => "__builtin_ptx_read_lanemask_le",
-    "llvm.ptx.read.lanemask.lt" => "__builtin_ptx_read_lanemask_lt",
-    "llvm.ptx.read.nsmid" => "__builtin_ptx_read_nsmid",
-    "llvm.ptx.read.nwarpid" => "__builtin_ptx_read_nwarpid",
-    "llvm.ptx.read.pm0" => "__builtin_ptx_read_pm0",
-    "llvm.ptx.read.pm1" => "__builtin_ptx_read_pm1",
-    "llvm.ptx.read.pm2" => "__builtin_ptx_read_pm2",
-    "llvm.ptx.read.pm3" => "__builtin_ptx_read_pm3",
-    "llvm.ptx.read.smid" => "__builtin_ptx_read_smid",
-    "llvm.ptx.read.warpid" => "__builtin_ptx_read_warpid",
-    // cuda
-    "llvm.cuda.syncthreads" => "__syncthreads",
-_ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
+    _ => unimplemented!("***** unsupported LLVM intrinsic {}", name),
 }