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authorbors <bors@rust-lang.org>2015-12-16 16:10:26 +0000
committerbors <bors@rust-lang.org>2015-12-16 16:10:26 +0000
commit073b0f9b852fa8b14ea4ab8c5a724043eb39fce5 (patch)
treeb0408d343a439f749c03adbbadfd1afab0c2b002
parentd4ffaf6f836e6ff8260548041bd1dc9d8bd146f9 (diff)
parent2b1536129827dbad754388695558ac37de063941 (diff)
downloadrust-073b0f9b852fa8b14ea4ab8c5a724043eb39fce5.tar.gz
rust-073b0f9b852fa8b14ea4ab8c5a724043eb39fce5.zip
Auto merge of #30337 - wesleywiser:mir_switch, r=nikomatsakis
Fixes #29574
-rw-r--r--src/librustc_trans/trans/mir/block.rs25
-rw-r--r--src/test/run-pass/mir_trans_switch.rs48
2 files changed, 71 insertions, 2 deletions
diff --git a/src/librustc_trans/trans/mir/block.rs b/src/librustc_trans/trans/mir/block.rs
index b58b51f5a2b..d7026b722af 100644
--- a/src/librustc_trans/trans/mir/block.rs
+++ b/src/librustc_trans/trans/mir/block.rs
@@ -10,6 +10,7 @@
 
 use llvm::BasicBlockRef;
 use rustc::mir::repr as mir;
+use trans::adt;
 use trans::base;
 use trans::build;
 use trans::common::Block;
@@ -46,8 +47,28 @@ impl<'bcx, 'tcx> MirContext<'bcx, 'tcx> {
                 build::CondBr(bcx, cond.immediate(), lltrue, llfalse, DebugLoc::None);
             }
 
-            mir::Terminator::Switch { .. } => {
-                unimplemented!()
+            mir::Terminator::Switch { ref discr, ref adt_def, ref targets } => {
+                let adt_ty = bcx.tcx().lookup_item_type(adt_def.did).ty;
+                let represented_ty = adt::represent_type(bcx.ccx(), adt_ty);
+
+                let discr_lvalue = self.trans_lvalue(bcx, discr);
+                let discr = adt::trans_get_discr(bcx, &represented_ty, discr_lvalue.llval, None);
+
+                // The else branch of the Switch can't be hit, so branch to an unreachable
+                // instruction so LLVM knows that
+                // FIXME it might be nice to have just one such block (created lazilly), we could
+                // store it in the "MIR trans" state.
+                let unreachable_blk = bcx.fcx.new_temp_block("enum-variant-unreachable");
+                build::Unreachable(unreachable_blk);
+
+                let switch = build::Switch(bcx, discr, unreachable_blk.llbb, targets.len());
+                assert_eq!(adt_def.variants.len(), targets.len());
+                for (adt_variant, target) in adt_def.variants.iter().zip(targets) {
+                    let llval = adt::trans_case(bcx, &*represented_ty, adt_variant.disr_val);
+                    let llbb = self.llblock(*target);
+
+                    build::AddCase(switch, llval, llbb)
+                }
             }
 
             mir::Terminator::SwitchInt { ref discr, switch_ty, ref values, ref targets } => {
diff --git a/src/test/run-pass/mir_trans_switch.rs b/src/test/run-pass/mir_trans_switch.rs
new file mode 100644
index 00000000000..c32d9da724d
--- /dev/null
+++ b/src/test/run-pass/mir_trans_switch.rs
@@ -0,0 +1,48 @@
+// Copyright 2015 The Rust Project Developers. See the COPYRIGHT
+// file at the top-level directory of this distribution and at
+// http://rust-lang.org/COPYRIGHT.
+//
+// Licensed under the Apache License, Version 2.0 <LICENSE-APACHE or
+// http://www.apache.org/licenses/LICENSE-2.0> or the MIT license
+// <LICENSE-MIT or http://opensource.org/licenses/MIT>, at your
+// option. This file may not be copied, modified, or distributed
+// except according to those terms.
+
+#![feature(rustc_attrs)]
+
+enum Abc {
+    A(u8),
+    B(i8),
+    C,
+    D,
+}
+
+#[rustc_mir]
+fn foo(x: Abc) -> i32 {
+    match x {
+        Abc::C => 3,
+        Abc::D => 4,
+        Abc::B(_) => 2,
+        Abc::A(_) => 1,
+    }
+}
+
+#[rustc_mir]
+fn foo2(x: Abc) -> bool {
+    match x {
+        Abc::D => true,
+        _ => false
+    }
+}
+
+fn main() {
+    assert_eq!(1, foo(Abc::A(42)));
+    assert_eq!(2, foo(Abc::B(-100)));
+    assert_eq!(3, foo(Abc::C));
+    assert_eq!(4, foo(Abc::D));
+
+    assert_eq!(false, foo2(Abc::A(1)));
+    assert_eq!(false, foo2(Abc::B(2)));
+    assert_eq!(false, foo2(Abc::C));
+    assert_eq!(true, foo2(Abc::D));
+}