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authoreV <ev@7pr.xyz>2018-10-13 15:52:40 +0000
committereV <ev@7pr.xyz>2018-10-13 15:52:40 +0000
commit0e131052f6ba7765249c7401406b504899994b7b (patch)
tree2b83493c24ecbc01a48a378b1fee61201d3b462a
parent965a97093e727ddbbc12a99bf4b431b7843a841c (diff)
downloadrust-0e131052f6ba7765249c7401406b504899994b7b.tar.gz
rust-0e131052f6ba7765249c7401406b504899994b7b.zip
fix tidy
-rw-r--r--src/librustc_target/spec/thumb_base.rs2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/librustc_target/spec/thumb_base.rs b/src/librustc_target/spec/thumb_base.rs
index 795a1fbcf98..22e5f49fd59 100644
--- a/src/librustc_target/spec/thumb_base.rs
+++ b/src/librustc_target/spec/thumb_base.rs
@@ -19,7 +19,7 @@
 // - Cortex-M7(F)
 // - Cortex-M23
 //
-// We have opted for these targets instead of one target per processor (e.g. `cortex-m0`, `cortex-m3`,
+// We have opted for these instead of one target per processor (e.g. `cortex-m0`, `cortex-m3`,
 // etc) because the differences between some processors like the cortex-m0 and cortex-m1 are almost
 // non-existent from the POV of codegen so it doesn't make sense to have separate targets for them.
 // And if differences exist between two processors under the same target, rustc flags can be used to