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| author | Amanieu d'Antras <amanieu@gmail.com> | 2020-08-26 10:46:51 +0100 |
|---|---|---|
| committer | Amanieu d'Antras <amanieu@gmail.com> | 2020-08-26 10:49:15 +0100 |
| commit | 178c1bbb5bcacf500f2d99d90d115b91a0727d42 (patch) | |
| tree | e0bf1e17a1ebf22b132c27602646154501327d14 | |
| parent | 2fe9a33659641d062c1fe3577327147b4d9943a2 (diff) | |
| download | rust-178c1bbb5bcacf500f2d99d90d115b91a0727d42.tar.gz rust-178c1bbb5bcacf500f2d99d90d115b91a0727d42.zip | |
Fix a typo in #75781
| -rw-r--r-- | src/librustc_codegen_llvm/asm.rs | 2 | ||||
| -rw-r--r-- | src/test/assembly/asm/aarch64-types.rs | 5 |
2 files changed, 6 insertions, 1 deletions
diff --git a/src/librustc_codegen_llvm/asm.rs b/src/librustc_codegen_llvm/asm.rs index 4fef94dde5f..a468d09c2d9 100644 --- a/src/librustc_codegen_llvm/asm.rs +++ b/src/librustc_codegen_llvm/asm.rs @@ -485,7 +485,7 @@ fn reg_to_llvm(reg: InlineAsmRegOrRegClass, layout: Option<&TyAndLayout<'tcx>>) format!("{{{}{}}}", class, idx) } else if reg == InlineAsmReg::AArch64(AArch64InlineAsmReg::x30) { // LLVM doesn't recognize x30 - "lr".to_string() + "{lr}".to_string() } else { format!("{{{}}}", reg.name()) } diff --git a/src/test/assembly/asm/aarch64-types.rs b/src/test/assembly/asm/aarch64-types.rs index e39f74c916c..73bf369e2da 100644 --- a/src/test/assembly/asm/aarch64-types.rs +++ b/src/test/assembly/asm/aarch64-types.rs @@ -555,6 +555,11 @@ check_reg!(v0_f32x4 f32x4 "s0" "fmov"); check_reg!(v0_f64x2 f64x2 "s0" "fmov"); // Regression test for #75761 +// CHECK-LABEL: issue_75761: +// CHECK: stp {{{.*}}}lr +// CHECK: //APP +// CHECK: //NO_APP +// CHECK: ldp {{{.*}}}lr pub unsafe fn issue_75761() { asm!("", out("v0") _, out("x30") _); } |