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authorGary Guo <gary@garyguo.net>2021-11-22 03:01:42 +0000
committerGary Guo <gary@garyguo.net>2021-11-22 16:28:14 +0000
commit31e7fa54a0e92beef60fcff84128626c4b01ef62 (patch)
tree04deebac3a447769175f2f5684d81456423f810e
parentcfdf10b259f20e94f82c39dcb87faaa12f7f8dc7 (diff)
downloadrust-31e7fa54a0e92beef60fcff84128626c4b01ef62.tar.gz
rust-31e7fa54a0e92beef60fcff84128626c4b01ef62.zip
Dispatch inline asm to the correct arch
-rw-r--r--src/inline_asm.rs10
1 files changed, 3 insertions, 7 deletions
diff --git a/src/inline_asm.rs b/src/inline_asm.rs
index 35876e57f35..688fda753b6 100644
--- a/src/inline_asm.rs
+++ b/src/inline_asm.rs
@@ -108,7 +108,7 @@ pub(crate) fn codegen_inline_asm<'tcx>(
 
     let mut asm_gen = InlineAssemblyGenerator {
         tcx: fx.tcx,
-        arch: InlineAsmArch::X86_64,
+        arch: fx.tcx.sess.asm_arch.unwrap(),
         template,
         operands,
         options,
@@ -306,12 +306,8 @@ impl<'tcx> InlineAssemblyGenerator<'_, 'tcx> {
         let mut slots_output = vec![None; self.operands.len()];
 
         let new_slot_fn = |slot_size: &mut Size, reg_class: InlineAsmRegClass| {
-            let reg_size = reg_class
-                .supported_types(InlineAsmArch::X86_64)
-                .iter()
-                .map(|(ty, _)| ty.size())
-                .max()
-                .unwrap();
+            let reg_size =
+                reg_class.supported_types(self.arch).iter().map(|(ty, _)| ty.size()).max().unwrap();
             let align = rustc_target::abi::Align::from_bytes(reg_size.bytes()).unwrap();
             let offset = slot_size.align_to(align);
             *slot_size = offset + reg_size;