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authorYuri Astrakhan <YuriAstrakhan@gmail.com>2022-03-30 15:14:15 -0400
committerYuri Astrakhan <YuriAstrakhan@gmail.com>2022-03-30 15:14:15 -0400
commit421baaff3f87742d00f5ed57f6a6c9dfd6c2b263 (patch)
tree1b82d40fce481320807211ef99dcfac64409b0e3
parent804cae3f9b2fffb71a3ea31f6a2941ca08b67d4f (diff)
Spellchecking compiler comments
This PR cleans up the rest of the spelling mistakes in the compiler comments. This PR does not change any literal or code spelling issues.
-rw-r--r--src/pretty_clif.rs2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/pretty_clif.rs b/src/pretty_clif.rs
index ca7116b887d..90024c5921a 100644
--- a/src/pretty_clif.rs
+++ b/src/pretty_clif.rs
@@ -23,7 +23,7 @@
 //!     ss2 = explicit_slot 8 ; _4: (&&[u16],) size=8 align=8,8
 //!     sig0 = (i64, i64, i64) system_v
 //!     sig1 = (i64, i64, i64) system_v
-//!     fn0 = colocated u0:6 sig1 ; Instance { def: Item(DefId(0/0:31 ~ example[8787]::{{impl}}[1]::call_mut[0])), substs: [ReErased, ReErased] }
+//!     fn0 = collocated u0:6 sig1 ; Instance { def: Item(DefId(0/0:31 ~ example[8787]::{{impl}}[1]::call_mut[0])), substs: [ReErased, ReErased] }
 //!
 //! block0(v0: i64, v1: i64, v2: i64):
 //!     v3 = stack_addr.i64 ss0