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authorMichael Goulet <michael@errs.io>2023-06-02 16:02:06 -0700
committerGitHub <noreply@github.com>2023-06-02 16:02:06 -0700
commit4ecd45a5889153f5844c142e404bf5398b24dfec (patch)
tree6ea5351c8118e8152a91038cab7731b323c8f81c
parentfcd93accb49b21c908e2b86af9e5f9e5d90534bb (diff)
parent919da2f16ce207dfac883182e8f70ebcd7079b66 (diff)
downloadrust-4ecd45a5889153f5844c142e404bf5398b24dfec.tar.gz
rust-4ecd45a5889153f5844c142e404bf5398b24dfec.zip
Rollup merge of #112168 - scottmcm:lower-div-rem-unchecked-to-mir, r=oli-obk
Lower `unchecked_div`/`_rem` to MIR's `BinOp::Div`/`Rem`

As described in <https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/mir/enum.BinOp.html#variant.Div>, the ordinary `BinOp`s for these are already UB for division by zero ([or overflow](https://llvm.org/docs/LangRef.html#sdiv-instruction), [demo](https://rust.godbolt.org/z/71e7P7Exh)), as MIR building is responsible for inserting code to panic for those cases regardless of whether the overflow checks are enabled.

So we can lower these in the same arm that lowers `wrapping_add` to MIR `BinOp::Add` and such, as all these cases turn into ordinary `Rvalue::BinaryOp`s.
-rw-r--r--src/intrinsics/mod.rs5
1 files changed, 1 insertions, 4 deletions
diff --git a/src/intrinsics/mod.rs b/src/intrinsics/mod.rs
index 0a513b08b74..1e83c30bd67 100644
--- a/src/intrinsics/mod.rs
+++ b/src/intrinsics/mod.rs
@@ -475,9 +475,7 @@ fn codegen_regular_intrinsic_call<'tcx>(
         sym::unchecked_add
         | sym::unchecked_sub
         | sym::unchecked_mul
-        | sym::unchecked_div
         | sym::exact_div
-        | sym::unchecked_rem
         | sym::unchecked_shl
         | sym::unchecked_shr => {
             intrinsic_args!(fx, args => (x, y); intrinsic);
@@ -487,8 +485,7 @@ fn codegen_regular_intrinsic_call<'tcx>(
                 sym::unchecked_add => BinOp::Add,
                 sym::unchecked_sub => BinOp::Sub,
                 sym::unchecked_mul => BinOp::Mul,
-                sym::unchecked_div | sym::exact_div => BinOp::Div,
-                sym::unchecked_rem => BinOp::Rem,
+                sym::exact_div => BinOp::Div,
                 sym::unchecked_shl => BinOp::Shl,
                 sym::unchecked_shr => BinOp::Shr,
                 _ => unreachable!(),