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| author | Thom Chiovoloni <thom@shift.click> | 2022-11-28 06:03:32 -0800 |
|---|---|---|
| committer | Thom Chiovoloni <thom@shift.click> | 2022-11-28 06:03:32 -0800 |
| commit | 54b6f6923e281ba68d13269b43faa927c6df83d5 (patch) | |
| tree | 5ae5756ab4eca0d05e79c363ae810ce14274e174 | |
| parent | 6e30c6eca3780d18f12335517970a5b9c2dfce7e (diff) | |
| download | rust-54b6f6923e281ba68d13269b43faa927c6df83d5.tar.gz rust-54b6f6923e281ba68d13269b43faa927c6df83d5.zip | |
Avoid a scalar loop in `Simd::from_slice`
| -rw-r--r-- | crates/core_simd/src/lib.rs | 1 | ||||
| -rw-r--r-- | crates/core_simd/src/vector.rs | 11 |
2 files changed, 5 insertions, 7 deletions
diff --git a/crates/core_simd/src/lib.rs b/crates/core_simd/src/lib.rs index 82873162969..34b79e630a4 100644 --- a/crates/core_simd/src/lib.rs +++ b/crates/core_simd/src/lib.rs @@ -1,5 +1,6 @@ #![no_std] #![feature( + const_ptr_read, convert_float_to_int, decl_macro, intra_doc_pointers, diff --git a/crates/core_simd/src/vector.rs b/crates/core_simd/src/vector.rs index d109087eaa6..51b0d999a81 100644 --- a/crates/core_simd/src/vector.rs +++ b/crates/core_simd/src/vector.rs @@ -174,13 +174,10 @@ where slice.len() >= LANES, "slice length must be at least the number of lanes" ); - let mut array = [slice[0]; LANES]; - let mut i = 0; - while i < LANES { - array[i] = slice[i]; - i += 1; - } - Self(array) + // Safety: + // - We've checked the length is sufficient. + // - `T` and `Simd<T, N>` are Copy types. + unsafe { slice.as_ptr().cast::<Self>().read_unaligned() } } /// Performs lanewise conversion of a SIMD vector's elements to another SIMD-valid type. |