rustc: remove redundant/unused fields from layout::Abi::Vector.

6 files changed, 19 insertions, 28 deletions

diff --git a/src/librustc/ty/layout.rs b/src/librustc/ty/layout.rs
index d52721bc17a..9d8736338f1 100644
--- a/src/librustc/ty/layout.rs
+++ b/src/librustc/ty/layout.rs
@@ -740,10 +740,7 @@ impl FieldPlacement {
 #[derive(Copy, Clone, PartialEq, Eq, Hash, Debug)]
 pub enum Abi {
     Scalar(Primitive),
-    Vector {
-        element: Primitive,
-        count: u64
-    },
+    Vector,
     Aggregate {
         /// If true, the size is exact, otherwise it's only a lower bound.
         sized: bool,
@@ -755,7 +752,7 @@ impl Abi {
     /// Returns true if the layout corresponds to an unsized type.
     pub fn is_unsized(&self) -> bool {
         match *self {
-            Abi::Scalar(_) | Abi::Vector { .. } => false,
+            Abi::Scalar(_) | Abi::Vector => false,
             Abi::Aggregate { sized, .. } => !sized
         }
     }
@@ -763,7 +760,7 @@ impl Abi {
     /// Returns true if the fields of the layout are packed.
     pub fn is_packed(&self) -> bool {
         match *self {
-            Abi::Scalar(_) | Abi::Vector { .. } => false,
+            Abi::Scalar(_) | Abi::Vector => false,
             Abi::Aggregate { packed, .. } => packed
         }
     }
@@ -1202,14 +1199,14 @@ impl<'a, 'tcx> CachedLayout {
             ty::TyAdt(def, ..) if def.repr.simd() => {
                 let count = ty.simd_size(tcx) as u64;
                 let element = cx.layout_of(ty.simd_type(tcx))?;
-                let element_scalar = match element.abi {
-                    Abi::Scalar(value) => value,
+                match element.abi {
+                    Abi::Scalar(_) => {}
                     _ => {
                         tcx.sess.fatal(&format!("monomorphising SIMD type `{}` with \
                                                 a non-machine element type `{}`",
                                                 ty, element.ty));
                     }
-                };
+                }
                 let size = element.size.checked_mul(count, dl)
                     .ok_or(LayoutError::SizeOverflow(ty))?;
                 let align = dl.vector_align(size);
@@ -1221,10 +1218,7 @@ impl<'a, 'tcx> CachedLayout {
                         stride: element.size,
                         count
                     },
-                    abi: Abi::Vector {
-                        element: element_scalar,
-                        count
-                    },
+                    abi: Abi::Vector,
                     size,
                     align,
                     primitive_align: align
@@ -2076,7 +2070,7 @@ impl<'a, 'tcx> TyLayout<'tcx> {
     pub fn is_zst(&self) -> bool {
         match self.abi {
             Abi::Scalar(_) => false,
-            Abi::Vector { count, .. } => count == 0,
+            Abi::Vector => self.size.bytes() == 0,
             Abi::Aggregate { sized, .. } => sized && self.size.bytes() == 0
         }
     }
@@ -2233,10 +2227,7 @@ impl<'gcx> HashStable<StableHashingContext<'gcx>> for Abi {
             Scalar(ref value) => {
                 value.hash_stable(hcx, hasher);
             }
-            Vector { ref element, count } => {
-                element.hash_stable(hcx, hasher);
-                count.hash_stable(hcx, hasher);
-            }
+            Vector => {}
             Aggregate { packed, sized } => {
                 packed.hash_stable(hcx, hasher);
                 sized.hash_stable(hcx, hasher);
diff --git a/src/librustc_trans/abi.rs b/src/librustc_trans/abi.rs
index 752de4d2835..688fa8fe02d 100644
--- a/src/librustc_trans/abi.rs
+++ b/src/librustc_trans/abi.rs
@@ -279,7 +279,7 @@ impl<'tcx> LayoutExt<'tcx> for TyLayout<'tcx> {
     fn is_aggregate(&self) -> bool {
         match self.abi {
             layout::Abi::Scalar(_) |
-            layout::Abi::Vector { .. } => false,
+            layout::Abi::Vector => false,
             layout::Abi::Aggregate { .. } => true
         }
     }
@@ -300,7 +300,7 @@ impl<'tcx> LayoutExt<'tcx> for TyLayout<'tcx> {
                 })
             }
 
-            layout::Abi::Vector { .. } => {
+            layout::Abi::Vector => {
                 Some(Reg {
                     kind: RegKind::Vector,
                     size: self.size
diff --git a/src/librustc_trans/cabi_x86_64.rs b/src/librustc_trans/cabi_x86_64.rs
index d5a51fa1863..b799a7690bd 100644
--- a/src/librustc_trans/cabi_x86_64.rs
+++ b/src/librustc_trans/cabi_x86_64.rs
@@ -75,14 +75,14 @@ fn classify_arg<'a, 'tcx>(ccx: &CrateContext<'a, 'tcx>, arg: &ArgType<'tcx>)
                 unify(cls, off, reg);
             }
 
-            layout::Abi::Vector { element, count } => {
+            layout::Abi::Vector => {
                 unify(cls, off, Class::Sse);
 
                 // everything after the first one is the upper
                 // half of a register.
-                let eltsz = element.size(ccx);
-                for i in 1..count {
-                    unify(cls, off + eltsz * (i as u64), Class::SseUp);
+                for i in 1..layout.fields.count() {
+                    let field_off = off + layout.fields.offset(i);
+                    unify(cls, field_off, Class::SseUp);
                 }
             }
 
diff --git a/src/librustc_trans/cabi_x86_win64.rs b/src/librustc_trans/cabi_x86_win64.rs
index c6d0e5e3a07..ceb649be197 100644
--- a/src/librustc_trans/cabi_x86_win64.rs
+++ b/src/librustc_trans/cabi_x86_win64.rs
@@ -26,7 +26,7 @@ pub fn compute_abi_info(fty: &mut FnType) {
                     _ => a.make_indirect()
                 }
             }
-            layout::Abi::Vector { .. } => {
+            layout::Abi::Vector => {
                 // FIXME(eddyb) there should be a size cap here
                 // (probably what clang calls "illegal vectors").
             }
diff --git a/src/librustc_trans/mir/constant.rs b/src/librustc_trans/mir/constant.rs
index cf6f72d21d6..d782ffe1f9d 100644
--- a/src/librustc_trans/mir/constant.rs
+++ b/src/librustc_trans/mir/constant.rs
@@ -1098,7 +1098,7 @@ fn trans_const_adt<'a, 'tcx>(
     match l.variants {
         layout::Variants::Single { index } => {
             assert_eq!(variant_index, index);
-            if let layout::Abi::Vector { .. } = l.abi {
+            if let layout::Abi::Vector = l.abi {
                 Const::new(C_vector(&vals.iter().map(|x| x.llval).collect::<Vec<_>>()), t)
             } else if let layout::FieldPlacement::Union(_) = l.fields {
                 assert_eq!(variant_index, 0);
diff --git a/src/librustc_trans/type_of.rs b/src/librustc_trans/type_of.rs
index 2b3ac0386ee..6fec1a675cd 100644
--- a/src/librustc_trans/type_of.rs
+++ b/src/librustc_trans/type_of.rs
@@ -23,7 +23,7 @@ fn uncached_llvm_type<'a, 'tcx>(ccx: &CrateContext<'a, 'tcx>,
                                 -> Type {
     match layout.abi {
         layout::Abi::Scalar(_) => bug!("handled elsewhere"),
-        layout::Abi::Vector { .. } => {
+        layout::Abi::Vector => {
             return Type::vector(&layout.field(ccx, 0).llvm_type(ccx),
                                 layout.fields.count() as u64);
         }
@@ -158,7 +158,7 @@ pub trait LayoutLlvmExt<'tcx> {
 impl<'tcx> LayoutLlvmExt<'tcx> for TyLayout<'tcx> {
     fn is_llvm_immediate(&self) -> bool {
         match self.abi {
-            layout::Abi::Scalar(_) | layout::Abi::Vector { .. } => true,
+            layout::Abi::Scalar(_) | layout::Abi::Vector => true,
 
             layout::Abi::Aggregate { .. } => self.is_zst()
         }