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authorAbhijit Gadgil <gabhijit@iitbombay.org>2020-11-01 08:22:25 +0530
committerAbhijit Gadgil <gabhijit@iitbombay.org>2020-11-01 08:22:25 +0530
commit66d68cdc6f5bb508052b890f8766a84a98533865 (patch)
treeec206146fe7b3ff361d8d5f79a5f7cd517669451
parent4f7612ac1499258025077f1fd05d2f429f9accfb (diff)
downloadrust-66d68cdc6f5bb508052b890f8766a84a98533865.tar.gz
rust-66d68cdc6f5bb508052b890f8766a84a98533865.zip
Trivial fixes to bitwise operator documentation
Added fixes to documentation of `BitAnd`, `BitOr`, `BitXor` and
`BitAndAssign`, where the documentation for implementation on
`Vector<bool>` was using logical operators in place of the bitwise
operators.

r? @steveklabnik
cc #78619
-rw-r--r--library/core/src/ops/bit.rs11
1 files changed, 7 insertions, 4 deletions
diff --git a/library/core/src/ops/bit.rs b/library/core/src/ops/bit.rs
index 6120da50c3c..3dae57938be 100644
--- a/library/core/src/ops/bit.rs
+++ b/library/core/src/ops/bit.rs
@@ -111,7 +111,7 @@ not_impl! { bool usize u8 u16 u32 u64 u128 isize i8 i16 i32 i64 i128 }
 ///         assert_eq!(lhs.len(), rhs.len());
 ///         Self(lhs.iter()
 ///                 .zip(rhs.iter())
-///                 .map(|(x, y)| *x && *y)
+///                 .map(|(x, y)| *x & *y)
 ///                 .collect())
 ///     }
 /// }
@@ -207,7 +207,10 @@ bitand_impl! { bool usize u8 u16 u32 u64 u128 isize i8 i16 i32 i64 i128 }
 ///     fn bitor(self, Self(rhs): Self) -> Self::Output {
 ///         let Self(lhs) = self;
 ///         assert_eq!(lhs.len(), rhs.len());
-///         Self(lhs.iter().zip(rhs.iter()).map(|(x, y)| *x || *y).collect())
+///         Self(lhs.iter()
+///                 .zip(rhs.iter())
+///                 .map(|(x, y)| *x | *y)
+///                 .collect())
 ///     }
 /// }
 ///
@@ -304,7 +307,7 @@ bitor_impl! { bool usize u8 u16 u32 u64 u128 isize i8 i16 i32 i64 i128 }
 ///         assert_eq!(lhs.len(), rhs.len());
 ///         Self(lhs.iter()
 ///                 .zip(rhs.iter())
-///                 .map(|(x, y)| (*x || *y) && !(*x && *y))
+///                 .map(|(x, y)| *x ^ *y))
 ///                 .collect())
 ///     }
 /// }
@@ -646,7 +649,7 @@ shr_impl_all! { u8 u16 u32 u64 u128 usize i8 i16 i32 i64 i128 isize }
 ///         *self = Self(self.0
 ///                          .iter()
 ///                          .zip(rhs.0.iter())
-///                          .map(|(x, y)| *x && *y)
+///                          .map(|(x, y)| *x & *y)
 ///                          .collect());
 ///     }
 /// }