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authorAntoni Boucher <bouanto@zoho.com>2022-11-24 18:32:17 -0500
committerAntoni Boucher <bouanto@zoho.com>2022-11-24 18:32:17 -0500
commit69341c44cced1fe7a8dac8ac7ffb2b9c3e63e48a (patch)
treecab20c78feb726ccc386e63b5c73353b8300225b
parent83c55fc4dff8a09ff7ca958cfec63e1b630e4c32 (diff)
downloadrust-69341c44cced1fe7a8dac8ac7ffb2b9c3e63e48a.tar.gz
rust-69341c44cced1fe7a8dac8ac7ffb2b9c3e63e48a.zip
Fix the argument order for some AVX-512 intrinsics
-rw-r--r--src/intrinsic/llvm.rs9
1 files changed, 9 insertions, 0 deletions
diff --git a/src/intrinsic/llvm.rs b/src/intrinsic/llvm.rs
index 621ef328a8c..4552ab95e53 100644
--- a/src/intrinsic/llvm.rs
+++ b/src/intrinsic/llvm.rs
@@ -304,6 +304,15 @@ pub fn adjust_intrinsic_arguments<'a, 'b, 'gcc, 'tcx>(builder: &Builder<'a, 'gcc
                 new_args[0] = arg1.dereference(None).to_rvalue();
                 args = new_args.into();
             },
+            "__builtin_ia32_rcp14sd_mask" | "__builtin_ia32_rcp14ss_mask" | "__builtin_ia32_rsqrt14sd_mask"
+                | "__builtin_ia32_rsqrt14ss_mask" => {
+                let new_args = args.to_vec();
+                args = vec![new_args[1], new_args[0], new_args[2], new_args[3]].into();
+            },
+            "__builtin_ia32_sqrtsd_mask_round" | "__builtin_ia32_sqrtss_mask_round" => {
+                let new_args = args.to_vec();
+                args = vec![new_args[1], new_args[0], new_args[2], new_args[3], new_args[4]].into();
+            },
             _ => (),
         }
     }