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| author | Alexis Beingessner <a.beingessner@gmail.com> | 2015-07-26 18:19:50 -0700 |
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| committer | Alexis Beingessner <a.beingessner@gmail.com> | 2015-07-26 18:19:50 -0700 |
| commit | 8c7111da07f20422a6bd5243b56d302f0f02c3a5 (patch) | |
| tree | 43dffb639ad89c85dfd90990af668476362e5c49 | |
| parent | 36a8b94464dd0cc7763fe3fb2fe9a3fbed273d06 (diff) | |
| download | rust-8c7111da07f20422a6bd5243b56d302f0f02c3a5.tar.gz rust-8c7111da07f20422a6bd5243b56d302f0f02c3a5.zip | |
fixup atomics
| -rw-r--r-- | src/doc/tarpl/atomics.md | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/doc/tarpl/atomics.md b/src/doc/tarpl/atomics.md index 8395b22c8d8..87378da7c52 100644 --- a/src/doc/tarpl/atomics.md +++ b/src/doc/tarpl/atomics.md @@ -85,12 +85,12 @@ x = 1; y *= 2; Ideally this program has 2 possible final states: -* `y = 3`: (thread 2 did the check before thread 1 completed) y = 6`: (thread 2 -* `did the check after thread 1 completed) +* `y = 3`: (thread 2 did the check before thread 1 completed) +* `y = 6`: (thread 2 did the check after thread 1 completed) However there's a third potential state that the hardware enables: -* `y = 2`: (thread 2 saw `x = 2`, but not `y = 3`, and then overwrote `y = 3`) +* `y = 2`: (thread 2 saw `x = 1`, but not `y = 3`, and then overwrote `y = 3`) It's worth noting that different kinds of CPU provide different guarantees. It is common to separate hardware into two categories: strongly-ordered and weakly- |