Auto merge of #43419 - lu-zero:master, r=alexcrichton

Add support for the VSX and Altivec features on PowerPC

4 files changed, 59 insertions, 0 deletions

diff --git a/src/etc/platform-intrinsics/powerpc.json b/src/etc/platform-intrinsics/powerpc.json
new file mode 100644
index 00000000000..5a7e986b532
--- /dev/null
+++ b/src/etc/platform-intrinsics/powerpc.json
@@ -0,0 +1,21 @@
+{
+    "platform": "powerpc",
+    "intrinsic_prefix": "_vec_",
+    "llvm_prefix": "llvm.ppc.altivec.",
+    "number_info": {
+        "unsigned": {},
+        "signed": {}
+    },
+    "width_info": {
+        "128": { "width": "" }
+    },
+    "intrinsics": [
+        {
+            "intrinsic": "perm",
+            "width": [128],
+            "llvm": "vperm",
+            "ret": "s32",
+            "args": ["0", "0", "s8"]
+        }
+    ]
+}
diff --git a/src/librustc_platform_intrinsics/lib.rs b/src/librustc_platform_intrinsics/lib.rs
index 347708a4f9b..ef1d9093df2 100644
--- a/src/librustc_platform_intrinsics/lib.rs
+++ b/src/librustc_platform_intrinsics/lib.rs
@@ -113,6 +113,7 @@ mod arm;
 mod aarch64;
 mod nvptx;
 mod hexagon;
+mod powerpc;
 
 impl Intrinsic {
     pub fn find(name: &str) -> Option<Intrinsic> {
@@ -126,6 +127,8 @@ impl Intrinsic {
             nvptx::find(name)
         } else if name.starts_with("Q6_") {
             hexagon::find(name)
+        } else if name.starts_with("powerpc_") {
+            powerpc::find(name)
         } else {
             None
         }
diff --git a/src/librustc_platform_intrinsics/powerpc.rs b/src/librustc_platform_intrinsics/powerpc.rs
new file mode 100644
index 00000000000..31b642b4055
--- /dev/null
+++ b/src/librustc_platform_intrinsics/powerpc.rs
@@ -0,0 +1,32 @@
+// Copyright 2015 The Rust Project Developers. See the COPYRIGHT
+// file at the top-level directory of this distribution and at
+// http://rust-lang.org/COPYRIGHT.
+//
+// Licensed under the Apache License, Version 2.0 <LICENSE-APACHE or
+// http://www.apache.org/licenses/LICENSE-2.0> or the MIT license
+// <LICENSE-MIT or http://opensource.org/licenses/MIT>, at your
+// option. This file may not be copied, modified, or distributed
+// except according to those terms.
+
+// DO NOT EDIT: autogenerated by etc/platform-intrinsics/generator.py
+// ignore-tidy-linelength
+
+#![allow(unused_imports)]
+
+use {Intrinsic, Type};
+use IntrinsicDef::Named;
+
+// The default inlining settings trigger a pathological behaviour in
+// LLVM, which causes makes compilation very slow. See #28273.
+#[inline(never)]
+pub fn find(name: &str) -> Option<Intrinsic> {
+    if !name.starts_with("powerpc") { return None }
+    Some(match &name["powerpc".len()..] {
+        "_vec_perm" => Intrinsic {
+            inputs: { static INPUTS: [&'static Type; 3] = [&::I32x4, &::I32x4, &::I8x16]; &INPUTS },
+            output: &::I32x4,
+            definition: Named("llvm.ppc.altivec.vperm")
+        },
+        _ => return None,
+    })
+}
diff --git a/src/librustc_trans/llvm_util.rs b/src/librustc_trans/llvm_util.rs
index 15f56036b0c..99ab1c47bed 100644
--- a/src/librustc_trans/llvm_util.rs
+++ b/src/librustc_trans/llvm_util.rs
@@ -80,6 +80,8 @@ const X86_WHITELIST: &'static [&'static str] = &["avx\0", "avx2\0", "bmi\0", "bm
 
 const HEXAGON_WHITELIST: &'static [&'static str] = &["hvx\0", "hvx-double\0"];
 
+const POWERPC_WHITELIST: &'static [&'static str] = &["altivec\0", "vsx\0"];
+
 pub fn target_features(sess: &Session) -> Vec<Symbol> {
     let target_machine = create_target_machine(sess);
 
@@ -87,6 +89,7 @@ pub fn target_features(sess: &Session) -> Vec<Symbol> {
         "arm" => ARM_WHITELIST,
         "x86" | "x86_64" => X86_WHITELIST,
         "hexagon" => HEXAGON_WHITELIST,
+        "powerpc" | "powerpc64" => POWERPC_WHITELIST,
         _ => &[],
     };