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authorB I Mohammed Abbas <bimohammadabbas@gmail.com>2025-01-07 09:18:31 +0530
committerB I Mohammed Abbas <bimohammadabbas@gmail.com>2025-01-07 09:18:31 +0530
commitaf15e048b209e98d8dfc5122129b49cd40524a0a (patch)
tree74f448e88619f7f9020fd6db84a208d3c8fee927
parent0f1e965fec3bc2f97b932e9dd8e85fca6d7faadc (diff)
Reserve x18 register for aarch64 wrs vxworks target
-rw-r--r--compiler/rustc_target/src/spec/targets/aarch64_wrs_vxworks.rs2
1 files changed, 1 insertions, 1 deletions
diff --git a/compiler/rustc_target/src/spec/targets/aarch64_wrs_vxworks.rs b/compiler/rustc_target/src/spec/targets/aarch64_wrs_vxworks.rs
index d5e78d03076..ac53cbaecce 100644
--- a/compiler/rustc_target/src/spec/targets/aarch64_wrs_vxworks.rs
+++ b/compiler/rustc_target/src/spec/targets/aarch64_wrs_vxworks.rs
@@ -13,7 +13,7 @@ pub(crate) fn target() -> Target {
         data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32".into(),
         arch: "aarch64".into(),
         options: TargetOptions {
-            features: "+v8a".into(),
+            features: "+v8a,+reserve-x18".into(),
             max_atomic_width: Some(128),
             stack_probes: StackProbeType::Inline,
             ..base::vxworks::opts()