loongarch: Mark partial basic intrinsics as safe

2 files changed, 41 insertions, 44 deletions

diff --git a/library/stdarch/crates/core_arch/src/loongarch64/mod.rs b/library/stdarch/crates/core_arch/src/loongarch64/mod.rs
index 3f1bfbcd0e1..e8249805eae 100644
--- a/library/stdarch/crates/core_arch/src/loongarch64/mod.rs
+++ b/library/stdarch/crates/core_arch/src/loongarch64/mod.rs
@@ -13,10 +13,9 @@ use crate::arch::asm;
 /// Reads the 64-bit stable counter value and the counter ID
 #[inline]
 #[unstable(feature = "stdarch_loongarch", issue = "117427")]
-pub unsafe fn rdtime_d() -> (i64, isize) {
-    let val: i64;
-    let tid: isize;
-    asm!("rdtime.d {}, {}", out(reg) val, out(reg) tid, options(readonly, nostack));
+pub fn rdtime_d() -> (i64, isize) {
+    let (val, tid): (i64, isize);
+    unsafe { asm!("rdtime.d {}, {}", out(reg) val, out(reg) tid, options(readonly, nostack)) };
     (val, tid)
 }
 
@@ -51,15 +50,15 @@ unsafe extern "unadjusted" {
 /// Calculate the CRC value using the IEEE 802.3 polynomial (0xEDB88320)
 #[inline]
 #[unstable(feature = "stdarch_loongarch", issue = "117427")]
-pub unsafe fn crc_w_d_w(a: i64, b: i32) -> i32 {
-    __crc_w_d_w(a, b)
+pub fn crc_w_d_w(a: i64, b: i32) -> i32 {
+    unsafe { __crc_w_d_w(a, b) }
 }
 
 /// Calculate the CRC value using the Castagnoli polynomial (0x82F63B78)
 #[inline]
 #[unstable(feature = "stdarch_loongarch", issue = "117427")]
-pub unsafe fn crcc_w_d_w(a: i64, b: i32) -> i32 {
-    __crcc_w_d_w(a, b)
+pub fn crcc_w_d_w(a: i64, b: i32) -> i32 {
+    unsafe { __crcc_w_d_w(a, b) }
 }
 
 /// Generates the cache operation instruction
diff --git a/library/stdarch/crates/core_arch/src/loongarch_shared/mod.rs b/library/stdarch/crates/core_arch/src/loongarch_shared/mod.rs
index da716ffd279..710b926f8df 100644
--- a/library/stdarch/crates/core_arch/src/loongarch_shared/mod.rs
+++ b/library/stdarch/crates/core_arch/src/loongarch_shared/mod.rs
@@ -5,20 +5,18 @@ use crate::arch::asm;
 /// Reads the lower 32-bit stable counter value and the counter ID
 #[inline]
 #[unstable(feature = "stdarch_loongarch", issue = "117427")]
-pub unsafe fn rdtimel_w() -> (i32, isize) {
-    let val: i32;
-    let tid: isize;
-    asm!("rdtimel.w {}, {}", out(reg) val, out(reg) tid, options(readonly, nostack));
+pub fn rdtimel_w() -> (i32, isize) {
+    let (val, tid): (i32, isize);
+    unsafe { asm!("rdtimel.w {}, {}", out(reg) val, out(reg) tid, options(readonly, nostack)) };
     (val, tid)
 }
 
 /// Reads the upper 32-bit stable counter value and the counter ID
 #[inline]
 #[unstable(feature = "stdarch_loongarch", issue = "117427")]
-pub unsafe fn rdtimeh_w() -> (i32, isize) {
-    let val: i32;
-    let tid: isize;
-    asm!("rdtimeh.w {}, {}", out(reg) val, out(reg) tid, options(readonly, nostack));
+pub fn rdtimeh_w() -> (i32, isize) {
+    let (val, tid): (i32, isize);
+    unsafe { asm!("rdtimeh.w {}, {}", out(reg) val, out(reg) tid, options(readonly, nostack)) };
     (val, tid)
 }
 
@@ -75,59 +73,59 @@ unsafe extern "unadjusted" {
 /// Calculate the CRC value using the IEEE 802.3 polynomial (0xEDB88320)
 #[inline]
 #[unstable(feature = "stdarch_loongarch", issue = "117427")]
-pub unsafe fn crc_w_b_w(a: i32, b: i32) -> i32 {
-    __crc_w_b_w(a, b)
+pub fn crc_w_b_w(a: i32, b: i32) -> i32 {
+    unsafe { __crc_w_b_w(a, b) }
 }
 
 /// Calculate the CRC value using the IEEE 802.3 polynomial (0xEDB88320)
 #[inline]
 #[unstable(feature = "stdarch_loongarch", issue = "117427")]
-pub unsafe fn crc_w_h_w(a: i32, b: i32) -> i32 {
-    __crc_w_h_w(a, b)
+pub fn crc_w_h_w(a: i32, b: i32) -> i32 {
+    unsafe { __crc_w_h_w(a, b) }
 }
 
 /// Calculate the CRC value using the IEEE 802.3 polynomial (0xEDB88320)
 #[inline]
 #[unstable(feature = "stdarch_loongarch", issue = "117427")]
-pub unsafe fn crc_w_w_w(a: i32, b: i32) -> i32 {
-    __crc_w_w_w(a, b)
+pub fn crc_w_w_w(a: i32, b: i32) -> i32 {
+    unsafe { __crc_w_w_w(a, b) }
 }
 
 /// Calculate the CRC value using the Castagnoli polynomial (0x82F63B78)
 #[inline]
 #[unstable(feature = "stdarch_loongarch", issue = "117427")]
-pub unsafe fn crcc_w_b_w(a: i32, b: i32) -> i32 {
-    __crcc_w_b_w(a, b)
+pub fn crcc_w_b_w(a: i32, b: i32) -> i32 {
+    unsafe { __crcc_w_b_w(a, b) }
 }
 
 /// Calculate the CRC value using the Castagnoli polynomial (0x82F63B78)
 #[inline]
 #[unstable(feature = "stdarch_loongarch", issue = "117427")]
-pub unsafe fn crcc_w_h_w(a: i32, b: i32) -> i32 {
-    __crcc_w_h_w(a, b)
+pub fn crcc_w_h_w(a: i32, b: i32) -> i32 {
+    unsafe { __crcc_w_h_w(a, b) }
 }
 
 /// Calculate the CRC value using the Castagnoli polynomial (0x82F63B78)
 #[inline]
 #[unstable(feature = "stdarch_loongarch", issue = "117427")]
-pub unsafe fn crcc_w_w_w(a: i32, b: i32) -> i32 {
-    __crcc_w_w_w(a, b)
+pub fn crcc_w_w_w(a: i32, b: i32) -> i32 {
+    unsafe { __crcc_w_w_w(a, b) }
 }
 
 /// Generates the memory barrier instruction
 #[inline]
 #[unstable(feature = "stdarch_loongarch", issue = "117427")]
-pub unsafe fn dbar<const IMM15: i32>() {
+pub fn dbar<const IMM15: i32>() {
     static_assert_uimm_bits!(IMM15, 15);
-    __dbar(IMM15);
+    unsafe { __dbar(IMM15) };
 }
 
 /// Generates the instruction-fetch barrier instruction
 #[inline]
 #[unstable(feature = "stdarch_loongarch", issue = "117427")]
-pub unsafe fn ibar<const IMM15: i32>() {
+pub fn ibar<const IMM15: i32>() {
     static_assert_uimm_bits!(IMM15, 15);
-    __ibar(IMM15);
+    unsafe { __ibar(IMM15) };
 }
 
 /// Moves data from a GPR to the FCSR
@@ -141,9 +139,9 @@ pub unsafe fn movgr2fcsr<const IMM5: i32>(a: i32) {
 /// Moves data from a FCSR to the GPR
 #[inline]
 #[unstable(feature = "stdarch_loongarch", issue = "117427")]
-pub unsafe fn movfcsr2gr<const IMM5: i32>() -> i32 {
+pub fn movfcsr2gr<const IMM5: i32>() -> i32 {
     static_assert_uimm_bits!(IMM5, 5);
-    __movfcsr2gr(IMM5)
+    unsafe { __movfcsr2gr(IMM5) }
 }
 
 /// Reads the 8-bit IO-CSR
@@ -199,8 +197,8 @@ pub unsafe fn brk<const IMM15: i32>() {
 /// Reads the CPU configuration register
 #[inline]
 #[unstable(feature = "stdarch_loongarch", issue = "117427")]
-pub unsafe fn cpucfg(a: i32) -> i32 {
-    __cpucfg(a)
+pub fn cpucfg(a: i32) -> i32 {
+    unsafe { __cpucfg(a) }
 }
 
 /// Generates the syscall instruction
@@ -215,30 +213,30 @@ pub unsafe fn syscall<const IMM15: i32>() {
 #[inline]
 #[target_feature(enable = "frecipe")]
 #[unstable(feature = "stdarch_loongarch", issue = "117427")]
-pub unsafe fn frecipe_s(a: f32) -> f32 {
-    __frecipe_s(a)
+pub fn frecipe_s(a: f32) -> f32 {
+    unsafe { __frecipe_s(a) }
 }
 
 /// Calculate the approximate double-precision result of 1.0 divided
 #[inline]
 #[target_feature(enable = "frecipe")]
 #[unstable(feature = "stdarch_loongarch", issue = "117427")]
-pub unsafe fn frecipe_d(a: f64) -> f64 {
-    __frecipe_d(a)
+pub fn frecipe_d(a: f64) -> f64 {
+    unsafe { __frecipe_d(a) }
 }
 
 /// Calculate the approximate single-precision result of dividing 1.0 by the square root
 #[inline]
 #[target_feature(enable = "frecipe")]
 #[unstable(feature = "stdarch_loongarch", issue = "117427")]
-pub unsafe fn frsqrte_s(a: f32) -> f32 {
-    __frsqrte_s(a)
+pub fn frsqrte_s(a: f32) -> f32 {
+    unsafe { __frsqrte_s(a) }
 }
 
 /// Calculate the approximate double-precision result of dividing 1.0 by the square root
 #[inline]
 #[target_feature(enable = "frecipe")]
 #[unstable(feature = "stdarch_loongarch", issue = "117427")]
-pub unsafe fn frsqrte_d(a: f64) -> f64 {
-    __frsqrte_d(a)
+pub fn frsqrte_d(a: f64) -> f64 {
+    unsafe { __frsqrte_d(a) }
 }