Rollup merge of #144632 - nikic:llvm-21-tests, r=durin42

Update some tests for LLVM 21

Fixes https://github.com/rust-lang/rust/issues/144604.
Fixes https://github.com/rust-lang/rust/issues/144606.

r? `@durin42`

3 files changed, 18 insertions, 8 deletions

diff --git a/tests/assembly-llvm/nvptx-safe-naming.rs b/tests/assembly-llvm/nvptx-safe-naming.rs
index d7b46aadd9c..6a6659a4e30 100644
--- a/tests/assembly-llvm/nvptx-safe-naming.rs
+++ b/tests/assembly-llvm/nvptx-safe-naming.rs
@@ -1,6 +1,9 @@
 //@ assembly-output: ptx-linker
 //@ compile-flags: --crate-type cdylib -Z unstable-options -Clinker-flavor=llbc
 //@ only-nvptx64
+//@ revisions: LLVM20 LLVM21
+//@ [LLVM21] min-llvm-version: 21
+//@ [LLVM20] max-llvm-major-version: 20
 
 #![feature(abi_ptx)]
 #![no_std]
@@ -15,7 +18,8 @@ extern crate breakpoint_panic_handler;
 #[no_mangle]
 pub unsafe extern "ptx-kernel" fn top_kernel(a: *const u32, b: *mut u32) {
     // CHECK:      call.uni (retval0),
-    // CHECK-NEXT: [[IMPL_FN]]
+    // LLVM20-NEXT: [[IMPL_FN]]
+    // LLVM21-SAME: [[IMPL_FN]]
     *b = deep::private::MyStruct::new(*a).square();
 }
 
diff --git a/tests/assembly-llvm/x86-return-float.rs b/tests/assembly-llvm/x86-return-float.rs
index 165c11d2280..4db93f68485 100644
--- a/tests/assembly-llvm/x86-return-float.rs
+++ b/tests/assembly-llvm/x86-return-float.rs
@@ -334,9 +334,9 @@ pub fn return_f128(x: f128) -> f128 {
     // linux-NEXT: .cfi_offset
     // CHECK-NEXT: movl %esp, %ebp
     // linux-NEXT: .cfi_def_cfa_register
-    // linux-NEXT: movaps 8(%ebp), %xmm0
-    // win-NEXT: movups 8(%ebp), %xmm0
-    // CHECK-NEXT: popl %ebp
+    // linux: movaps 8(%ebp), %xmm0
+    // win: movups 8(%ebp), %xmm0
+    // CHECK: popl %ebp
     // linux-NEXT: .cfi_def_cfa
     // CHECK-NEXT: retl
     x
diff --git a/tests/codegen-llvm/enum/enum-discriminant-eq.rs b/tests/codegen-llvm/enum/enum-discriminant-eq.rs
index 0494c5f551b..d599685c2e5 100644
--- a/tests/codegen-llvm/enum/enum-discriminant-eq.rs
+++ b/tests/codegen-llvm/enum/enum-discriminant-eq.rs
@@ -1,6 +1,9 @@
 //@ compile-flags: -Copt-level=3 -Zmerge-functions=disabled
 //@ min-llvm-version: 20
 //@ only-64bit
+//@ revisions: LLVM20 LLVM21
+//@ [LLVM21] min-llvm-version: 21
+//@ [LLVM20] max-llvm-major-version: 20
 
 // The `derive(PartialEq)` on enums with field-less variants compares discriminants,
 // so make sure we emit that in some reasonable way.
@@ -137,17 +140,20 @@ pub fn mid_nz32_eq_discr(a: Mid<NonZero<u32>>, b: Mid<NonZero<u32>>) -> bool {
 pub fn mid_ac_eq_discr(a: Mid<AC>, b: Mid<AC>) -> bool {
     // CHECK-LABEL: @mid_ac_eq_discr(
 
-    // CHECK: %[[A_REL_DISCR:.+]] = xor i8 %a, -128
+    // LLVM20: %[[A_REL_DISCR:.+]] = xor i8 %a, -128
     // CHECK: %[[A_IS_NICHE:.+]] = icmp slt i8 %a, 0
     // CHECK: %[[A_NOT_HOLE:.+]] = icmp ne i8 %a, -127
     // CHECK: tail call void @llvm.assume(i1 %[[A_NOT_HOLE]])
-    // CHECK: %[[A_DISCR:.+]] = select i1 %[[A_IS_NICHE]], i8 %[[A_REL_DISCR]], i8 1
+    // LLVM20: %[[A_DISCR:.+]] = select i1 %[[A_IS_NICHE]], i8 %[[A_REL_DISCR]], i8 1
 
-    // CHECK: %[[B_REL_DISCR:.+]] = xor i8 %b, -128
+    // LLVM20: %[[B_REL_DISCR:.+]] = xor i8 %b, -128
     // CHECK: %[[B_IS_NICHE:.+]] = icmp slt i8 %b, 0
     // CHECK: %[[B_NOT_HOLE:.+]] = icmp ne i8 %b, -127
     // CHECK: tail call void @llvm.assume(i1 %[[B_NOT_HOLE]])
-    // CHECK: %[[B_DISCR:.+]] = select i1 %[[B_IS_NICHE]], i8 %[[B_REL_DISCR]], i8 1
+    // LLVM20: %[[B_DISCR:.+]] = select i1 %[[B_IS_NICHE]], i8 %[[B_REL_DISCR]], i8 1
+
+    // LLVM21: %[[A_DISCR:.+]] = select i1 %[[A_IS_NICHE]], i8 %a, i8 -127
+    // LLVM21: %[[B_DISCR:.+]] = select i1 %[[B_IS_NICHE]], i8 %b, i8 -127
 
     // CHECK: %[[R:.+]] = icmp eq i8 %[[A_DISCR]], %[[B_DISCR]]
     // CHECK: ret i1 %[[R]]