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| author | Scott Mabin <scott@mabez.dev> | 2023-12-07 12:04:09 +0000 |
|---|---|---|
| committer | Scott Mabin <scott@mabez.dev> | 2023-12-18 11:17:39 +0000 |
| commit | bd7263c4d3bb7da94fe32bffc2592d82523f45a8 (patch) | |
| tree | 028a8780517fbb6189ddc7b068ef727209ab1bd2 | |
| parent | e004adb5561b724ac18f5b24584648ca4e42b6ad (diff) | |
| download | rust-bd7263c4d3bb7da94fe32bffc2592d82523f45a8.tar.gz rust-bd7263c4d3bb7da94fe32bffc2592d82523f45a8.zip | |
Promote `riscv32{im|imafc}` targets to tier 2
| -rw-r--r-- | src/doc/rustc/src/platform-support.md | 4 | ||||
| -rw-r--r-- | src/doc/rustc/src/platform-support/riscv32imac-unknown-none-elf.md | 8 |
2 files changed, 6 insertions, 6 deletions
diff --git a/src/doc/rustc/src/platform-support.md b/src/doc/rustc/src/platform-support.md index 5535e69c86a..ecbcf1fb085 100644 --- a/src/doc/rustc/src/platform-support.md +++ b/src/doc/rustc/src/platform-support.md @@ -161,7 +161,9 @@ target | std | notes [`nvptx64-nvidia-cuda`](platform-support/nvptx64-nvidia-cuda.md) | * | --emit=asm generates PTX code that [runs on NVIDIA GPUs] [`riscv32imac-unknown-none-elf`](platform-support/riscv32imac-unknown-none-elf.md) | * | Bare RISC-V (RV32IMAC ISA) [`riscv32i-unknown-none-elf`](platform-support/riscv32imac-unknown-none-elf.md) | * | Bare RISC-V (RV32I ISA) +[`riscv32im-unknown-none-elf`](platform-support/riscv32imac-unknown-none-elf.md) | * | | Bare RISC-V (RV32IM ISA) [`riscv32imc-unknown-none-elf`](platform-support/riscv32imac-unknown-none-elf.md) | * | Bare RISC-V (RV32IMC ISA) +[`riscv32imafc-unknown-none-elf`](platform-support/riscv32imac-unknown-none-elf.md) | * | Bare RISC-V (RV32IMAFC ISA) `riscv64gc-unknown-none-elf` | * | Bare RISC-V (RV64IMAFDC ISA) `riscv64imac-unknown-none-elf` | * | Bare RISC-V (RV64IMAC ISA) `sparc64-unknown-linux-gnu` | ✓ | SPARC Linux (kernel 4.4, glibc 2.23) @@ -315,8 +317,6 @@ target | std | host | notes [`powerpc64-ibm-aix`](platform-support/aix.md) | ? | | 64-bit AIX (7.2 and newer) `riscv32gc-unknown-linux-gnu` | | | RISC-V Linux (kernel 5.4, glibc 2.33) `riscv32gc-unknown-linux-musl` | | | RISC-V Linux (kernel 5.4, musl + RISCV32 support patches) -[`riscv32imafc-unknown-none-elf`](platform-support/riscv32imac-unknown-none-elf.md) | * | Bare RISC-V (RV32IMAFC ISA) -[`riscv32im-unknown-none-elf`](platform-support/riscv32imac-unknown-none-elf.md) | * | | Bare RISC-V (RV32IM ISA) [`riscv32imac-unknown-xous-elf`](platform-support/riscv32imac-unknown-xous-elf.md) | ? | | RISC-V Xous (RV32IMAC ISA) [`riscv32imc-esp-espidf`](platform-support/esp-idf.md) | ✓ | | RISC-V ESP-IDF [`riscv32imac-esp-espidf`](platform-support/esp-idf.md) | ✓ | | RISC-V ESP-IDF diff --git a/src/doc/rustc/src/platform-support/riscv32imac-unknown-none-elf.md b/src/doc/rustc/src/platform-support/riscv32imac-unknown-none-elf.md index a069f3d3aa9..739b12bad8b 100644 --- a/src/doc/rustc/src/platform-support/riscv32imac-unknown-none-elf.md +++ b/src/doc/rustc/src/platform-support/riscv32imac-unknown-none-elf.md @@ -1,6 +1,6 @@ # `riscv32{i,im,imc,imac,imafc}-unknown-none-elf` -**Tier: 2/3** +**Tier: 2** Bare-metal target for RISC-V CPUs with the RV32I, RV32IM, RV32IMC, RV32IMAFC and RV32IMAC ISAs. @@ -24,11 +24,11 @@ This target is included in Rust and can be installed via `rustup`. ## Testing -This is a cross-compiled no-std target, which must be run either in a simulator +This is a cross-compiled `no-std` target, which must be run either in a simulator or by programming them onto suitable hardware. It is not possible to run the -Rust testsuite on this target. +Rust test-suite on this target. ## Cross-compilation toolchains and C code This target supports C code. If interlinking with C or C++, you may need to use -riscv64-unknown-elf-gcc as a linker instead of rust-lld. +`riscv64-unknown-elf-gcc` as a linker instead of `rust-lld`. |