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| author | Dylan DPC <dylan.dpc@gmail.com> | 2020-08-22 02:14:54 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-08-22 02:14:54 +0200 |
| commit | cb9ef0988e8f49d45c184dc68c57a93bfcca399f (patch) | |
| tree | 5179cc3079e345484d3cd7b8422e8f123a65e705 | |
| parent | d8262297ad5b9a69f17ba026d7041e50233d1bc1 (diff) | |
| parent | 4fe4c3b7e3668c525bec91be33a29852b2c68a4d (diff) | |
| download | rust-cb9ef0988e8f49d45c184dc68c57a93bfcca399f.tar.gz rust-cb9ef0988e8f49d45c184dc68c57a93bfcca399f.zip | |
Rollup merge of #75781 - Amanieu:asm-fix, r=nagisa
More inline asm register name fixups for LLVM Fixes #75761 r? @nagisa
| -rw-r--r-- | src/librustc_codegen_llvm/asm.rs | 7 | ||||
| -rw-r--r-- | src/test/assembly/asm/aarch64-types.rs | 5 |
2 files changed, 10 insertions, 2 deletions
diff --git a/src/librustc_codegen_llvm/asm.rs b/src/librustc_codegen_llvm/asm.rs index a6062de6bf8..4fef94dde5f 100644 --- a/src/librustc_codegen_llvm/asm.rs +++ b/src/librustc_codegen_llvm/asm.rs @@ -479,10 +479,13 @@ fn reg_to_llvm(reg: InlineAsmRegOrRegClass, layout: Option<&TyAndLayout<'tcx>>) _ => unreachable!(), } } else { - // We use i32 as the type for discarded outputs - 's' + // We use i64x2 as the type for discarded outputs + 'q' }; format!("{{{}{}}}", class, idx) + } else if reg == InlineAsmReg::AArch64(AArch64InlineAsmReg::x30) { + // LLVM doesn't recognize x30 + "lr".to_string() } else { format!("{{{}}}", reg.name()) } diff --git a/src/test/assembly/asm/aarch64-types.rs b/src/test/assembly/asm/aarch64-types.rs index a8df350ef60..e39f74c916c 100644 --- a/src/test/assembly/asm/aarch64-types.rs +++ b/src/test/assembly/asm/aarch64-types.rs @@ -553,3 +553,8 @@ check_reg!(v0_f32x4 f32x4 "s0" "fmov"); // CHECK: fmov s0, s0 // CHECK: //NO_APP check_reg!(v0_f64x2 f64x2 "s0" "fmov"); + +// Regression test for #75761 +pub unsafe fn issue_75761() { + asm!("", out("v0") _, out("x30") _); +} |