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| author | Tim Neumann <timnn@google.com> | 2024-09-12 09:53:59 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-09-12 09:53:59 +0200 |
| commit | cf006f375d93a22fca47b86a5a0c348457f93d1f (patch) | |
| tree | 94bc17d4f04512b2605ca7495eb9dd041673041b | |
| parent | 1f51450c6826cc4c3d1089cd3f57089a14f49190 (diff) | |
| download | rust-cf006f375d93a22fca47b86a5a0c348457f93d1f.tar.gz rust-cf006f375d93a22fca47b86a5a0c348457f93d1f.zip | |
small_data_threshold.rs: Adapt to LLVM head changes
| -rw-r--r-- | tests/assembly/small_data_threshold.rs | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/tests/assembly/small_data_threshold.rs b/tests/assembly/small_data_threshold.rs index b0c0a63ca49..d3ba144600e 100644 --- a/tests/assembly/small_data_threshold.rs +++ b/tests/assembly/small_data_threshold.rs @@ -58,7 +58,7 @@ static mut Z: u64 = 0; // Currently, only MIPS and RISCV successfully put any objects in the small data // sections so the U/V/W/X tests are skipped on Hexagon and M68K -//@ RISCV: .section .sdata, +//@ RISCV: .section .sdata //@ RISCV-NOT: .section //@ RISCV: U: //@ RISCV: .section .sbss @@ -71,7 +71,7 @@ static mut Z: u64 = 0; //@ RISCV-NOT: .section //@ RISCV: X: -//@ MIPS: .section .sdata, +//@ MIPS: .section .sdata //@ MIPS-NOT: .section //@ MIPS: U: //@ MIPS: .section .sbss |