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| author | Huon Wilson <dbau.pp+github@gmail.com> | 2015-08-11 09:55:16 -0700 |
|---|---|---|
| committer | Huon Wilson <dbau.pp+github@gmail.com> | 2015-08-17 14:41:40 -0700 |
| commit | d598bddc98f431ce92d9a3f33d7544ed637eda47 (patch) | |
| tree | 9ad63bcc5bcfac3f1385399ab3c7ade1f787cf58 | |
| parent | 2a408ef6eee07b447b8b21f2233b01d3231c8f81 (diff) | |
| download | rust-d598bddc98f431ce92d9a3f33d7544ed637eda47.tar.gz rust-d598bddc98f431ce92d9a3f33d7544ed637eda47.zip | |
Reorganise ARM intrinsic definitions.
| -rw-r--r-- | src/librustc_platform_intrinsics/arm.rs | 46 |
1 files changed, 21 insertions, 25 deletions
diff --git a/src/librustc_platform_intrinsics/arm.rs b/src/librustc_platform_intrinsics/arm.rs index ed1121b98df..bc874046889 100644 --- a/src/librustc_platform_intrinsics/arm.rs +++ b/src/librustc_platform_intrinsics/arm.rs @@ -17,31 +17,27 @@ macro_rules! p { } } pub fn find<'tcx>(_tcx: &ty::ctxt<'tcx>, name: &str) -> Option<Intrinsic> { - Some(match name { - "vpmax_u8" => p!("vpmaxu.v8i8", (i8x8, i8x8) -> i8x8), - "vpmax_s8" => p!("vpmaxs.v8i8", (i8x8, i8x8) -> i8x8), - "vpmax_u16" => p!("vpmaxu.v4i16", (i16x4, i16x4) -> i16x4), - "vpmax_s16" => p!("vpmaxs.v4i16", (i16x4, i16x4) -> i16x4), - "vpmax_u32" => p!("vpmaxu.v2i32", (i32x2, i32x2) -> i32x2), - "vpmax_s32" => p!("vpmaxs.v2i32", (i32x2, i32x2) -> i32x2), - - "vpmin_u8" => p!("vpminu.v8i8", (i8x8, i8x8) -> i8x8), - "vpmin_s8" => p!("vpmins.v8i8", (i8x8, i8x8) -> i8x8), - "vpmin_u16" => p!("vpminu.v4i16", (i16x4, i16x4) -> i16x4), - "vpmin_s16" => p!("vpmins.v4i16", (i16x4, i16x4) -> i16x4), - "vpmin_u32" => p!("vpminu.v2i32", (i32x2, i32x2) -> i32x2), - "vpmin_s32" => p!("vpmins.v2i32", (i32x2, i32x2) -> i32x2), - - "vsqrtq_f32" => plain!("llvm.sqrt.v4f32", (f32x4) -> f32x4), - "vsqrtq_f64" => plain!("llvm.sqrt.v2f64", (f64x2) -> f64x2), - - "vrecpeq_f32" => p!("vrecpe.v4f32", (f32x4) -> f32x4), - "vrsqrteq_f32" => p!("vrsqrte.v4f32", (f32x4) -> f32x4), - "vrsqrteq_f64" => p!("vrsqrte.v2f64", (f64x2) -> f64x2), - - "vmaxq_f32" => p!("vmaxs.v4f32", (f32x4, f32x4) -> f32x4), - - "vminq_f32" => p!("vmins.v4f32", (f32x4, f32x4) -> f32x4), + if !name.starts_with("v") { return None } + Some(match &name["v".len()..] { + "maxq_f32" => p!("vmaxs.v4f32", (f32x4, f32x4) -> f32x4), + "minq_f32" => p!("vmins.v4f32", (f32x4, f32x4) -> f32x4), + "pmax_s16" => p!("vpmaxs.v4i16", (i16x4, i16x4) -> i16x4), + "pmax_s32" => p!("vpmaxs.v2i32", (i32x2, i32x2) -> i32x2), + "pmax_s8" => p!("vpmaxs.v8i8", (i8x8, i8x8) -> i8x8), + "pmax_u16" => p!("vpmaxu.v4i16", (i16x4, i16x4) -> i16x4), + "pmax_u32" => p!("vpmaxu.v2i32", (i32x2, i32x2) -> i32x2), + "pmax_u8" => p!("vpmaxu.v8i8", (i8x8, i8x8) -> i8x8), + "pmin_s16" => p!("vpmins.v4i16", (i16x4, i16x4) -> i16x4), + "pmin_s32" => p!("vpmins.v2i32", (i32x2, i32x2) -> i32x2), + "pmin_s8" => p!("vpmins.v8i8", (i8x8, i8x8) -> i8x8), + "pmin_u16" => p!("vpminu.v4i16", (i16x4, i16x4) -> i16x4), + "pmin_u32" => p!("vpminu.v2i32", (i32x2, i32x2) -> i32x2), + "pmin_u8" => p!("vpminu.v8i8", (i8x8, i8x8) -> i8x8), + "recpeq_f32" => p!("vrecpe.v4f32", (f32x4) -> f32x4), + "rsqrteq_f32" => p!("vrsqrte.v4f32", (f32x4) -> f32x4), + "rsqrteq_f64" => p!("vrsqrte.v2f64", (f64x2) -> f64x2), + "sqrtq_f32" => plain!("llvm.sqrt.v4f32", (f32x4) -> f32x4), + "sqrtq_f64" => plain!("llvm.sqrt.v2f64", (f64x2) -> f64x2), _ => return None, }) } |