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| author | Folkert <folkert@folkertdev.nl> | 2024-05-11 21:44:08 +0200 |
|---|---|---|
| committer | Folkert <folkert@folkertdev.nl> | 2024-05-11 21:44:08 +0200 |
| commit | e7b6662464d62bbe1590fa8b8b709b4ffc3d3831 (patch) | |
| tree | 15d9b0de4abe2653975f22e0b7dea57079a235b1 | |
| parent | 7b50189dce74cf5b86cd928161138a2bd6c9305f (diff) | |
| download | rust-e7b6662464d62bbe1590fa8b8b709b4ffc3d3831.tar.gz rust-e7b6662464d62bbe1590fa8b8b709b4ffc3d3831.zip | |
support crc32 with 8-bit and 16-bit inputs, and add crc64 support
| -rw-r--r-- | src/intrinsics/llvm_x86.rs | 15 |
1 files changed, 13 insertions, 2 deletions
diff --git a/src/intrinsics/llvm_x86.rs b/src/intrinsics/llvm_x86.rs index 71e06c73a37..1155a00a2f0 100644 --- a/src/intrinsics/llvm_x86.rs +++ b/src/intrinsics/llvm_x86.rs @@ -832,16 +832,27 @@ pub(crate) fn codegen_x86_llvm_intrinsic_call<'tcx>( } } - "llvm.x86.sse42.crc32.32.32" => { + "llvm.x86.sse42.crc32.32.8" + | "llvm.x86.sse42.crc32.32.16" + | "llvm.x86.sse42.crc32.32.32" + | "llvm.x86.sse42.crc32.64.64" => { // https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#ig_expand=1419&text=_mm_crc32_u32 intrinsic_args!(fx, args => (crc, v); intrinsic); let crc = crc.load_scalar(fx); let v = v.load_scalar(fx); + let asm = match intrinsic { + "llvm.x86.sse42.crc32.32.8" => "crc32 eax, dl", + "llvm.x86.sse42.crc32.32.16" => "crc32 eax, dx", + "llvm.x86.sse42.crc32.32.32" => "crc32 eax, edx", + "llvm.x86.sse42.crc32.64.64" => "crc32 rax, rdx", + _ => unreachable!(), + }; + codegen_inline_asm_inner( fx, - &[InlineAsmTemplatePiece::String("crc32 eax, edx".to_string())], + &[InlineAsmTemplatePiece::String(asm.to_string())], &[ CInlineAsmOperand::InOut { reg: InlineAsmRegOrRegClass::Reg(InlineAsmReg::X86(X86InlineAsmReg::ax)), |