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| author | Yuki Okushi <jtitor@2k36.org> | 2022-06-09 19:19:55 +0900 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2022-06-09 19:19:55 +0900 |
| commit | fa4f8f144c9b1938afeef5b36834766901c2ba39 (patch) | |
| tree | 76a1e6d06d61602418134b7a7c2ed196ed0923df | |
| parent | afa2edbe429467577c98a346323807c3df04a105 (diff) | |
| parent | d92e213e3d2470e16c5e0107a9d6e41f54a40342 (diff) | |
| download | rust-fa4f8f144c9b1938afeef5b36834766901c2ba39.tar.gz rust-fa4f8f144c9b1938afeef5b36834766901c2ba39.zip | |
Rollup merge of #97838 - durin42:llvm-15-hexagon, r=Amanieu
hexagon: adapt test for upstream output changes The output of IR formatting changed slightly in upstream rev a0bc67e555f404d0e7ddb2e78cb891d96eaf913d (https://reviews.llvm.org/D123096). I'm not actually sure what any of that means, as I don't even know what hexagon is in this context, but this change allows the test to pass on both old and new LLVMs. r? ``@nikic``
| -rw-r--r-- | src/test/assembly/asm/hexagon-types.rs | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/test/assembly/asm/hexagon-types.rs b/src/test/assembly/asm/hexagon-types.rs index de310c78488..eff9a0bb431 100644 --- a/src/test/assembly/asm/hexagon-types.rs +++ b/src/test/assembly/asm/hexagon-types.rs @@ -73,7 +73,7 @@ macro_rules! check_reg { // CHECK-LABEL: sym_static: // CHECK: InlineAsm Start -// CHECK: r0 = #extern_static +// CHECK: r0 = {{#+}}extern_static // CHECK: InlineAsm End #[no_mangle] pub unsafe fn sym_static() { @@ -88,7 +88,7 @@ pub unsafe fn sym_static() { // CHECK-LABEL: sym_fn: // CHECK: InlineAsm Start -// CHECK: r0 = #extern_func +// CHECK: r0 = {{#+}}extern_func // CHECK: InlineAsm End #[no_mangle] pub unsafe fn sym_fn() { @@ -108,7 +108,7 @@ pub unsafe fn sym_fn() { // CHECK: InlineAsm Start // CHECK: { // CHECK: r{{[0-9]+}} = r0 -// CHECK: memw(r1) = r{{[0-9]+}} +// CHECK: memw(r1{{(\+#0)?}}) = r{{[0-9]+}} // CHECK: } // CHECK: InlineAsm End #[no_mangle] |