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authorMatthias Krüger <matthias.krueger@famsik.de>2024-10-11 15:36:51 +0200
committerGitHub <noreply@github.com>2024-10-11 15:36:51 +0200
commitfc81a7c1d58468e0380e6d396ffebed694e7bd56 (patch)
tree37485aecf00f076d61b3670fce4cd83b44f8e9ce
parent7c79621462e724d123fb5788e5d797067f5f1222 (diff)
parente502a7f13a4605503e1b73cfdfb69d64d11ea722 (diff)
downloadrust-fc81a7c1d58468e0380e6d396ffebed694e7bd56.tar.gz
rust-fc81a7c1d58468e0380e6d396ffebed694e7bd56.zip
Rollup merge of #131208 - mustartt:aix-call-abi, r=davidtwco
ABI: Pass aggregates by value on AIX

On AIX we pass aggregates byval. Adds new ABI for AIX for powerpc64.

https://github.com/llvm/llvm-project/blob/313ad85dfa40a18f2edefd7ce2edc0528d5a554a/clang/lib/CodeGen/Targets/PPC.cpp#L216

Fixes the following 2 testcases on AIX:
```
tests/ui/abi/extern/extern-pass-TwoU16s.rs
tests/ui/abi/extern/extern-pass-TwoU8s.rs
```
-rw-r--r--compiler/rustc_target/src/abi/call/powerpc64.rs16
-rw-r--r--tests/assembly/powerpc64-struct-abi.rs43
2 files changed, 52 insertions, 7 deletions
diff --git a/compiler/rustc_target/src/abi/call/powerpc64.rs b/compiler/rustc_target/src/abi/call/powerpc64.rs
index b9767bf906b..71e533b8cc5 100644
--- a/compiler/rustc_target/src/abi/call/powerpc64.rs
+++ b/compiler/rustc_target/src/abi/call/powerpc64.rs
@@ -10,6 +10,7 @@ use crate::spec::HasTargetSpec;
 enum ABI {
     ELFv1, // original ABI used for powerpc64 (big-endian)
     ELFv2, // newer ABI used for powerpc64le and musl (both endians)
+    AIX,   // used by AIX OS, big-endian only
 }
 use ABI::*;
 
@@ -23,9 +24,9 @@ where
     C: HasDataLayout,
 {
     arg.layout.homogeneous_aggregate(cx).ok().and_then(|ha| ha.unit()).and_then(|unit| {
-        // ELFv1 only passes one-member aggregates transparently.
+        // ELFv1 and AIX only passes one-member aggregates transparently.
         // ELFv2 passes up to eight uniquely addressable members.
-        if (abi == ELFv1 && arg.layout.size > unit.size)
+        if ((abi == ELFv1 || abi == AIX) && arg.layout.size > unit.size)
             || arg.layout.size > unit.size.checked_mul(8, cx).unwrap()
         {
             return None;
@@ -55,8 +56,15 @@ where
         return;
     }
 
+    // The AIX ABI expect byval for aggregates
+    // See https://github.com/llvm/llvm-project/blob/main/clang/lib/CodeGen/Targets/PPC.cpp.
+    if !is_ret && abi == AIX {
+        arg.pass_by_stack_offset(None);
+        return;
+    }
+
     // The ELFv1 ABI doesn't return aggregates in registers
-    if is_ret && abi == ELFv1 {
+    if is_ret && (abi == ELFv1 || abi == AIX) {
         arg.make_indirect();
         return;
     }
@@ -93,6 +101,8 @@ where
 {
     let abi = if cx.target_spec().env == "musl" {
         ELFv2
+    } else if cx.target_spec().os == "aix" {
+        AIX
     } else {
         match cx.data_layout().endian {
             Endian::Big => ELFv1,
diff --git a/tests/assembly/powerpc64-struct-abi.rs b/tests/assembly/powerpc64-struct-abi.rs
index 9a3540d8b41..7052937acf6 100644
--- a/tests/assembly/powerpc64-struct-abi.rs
+++ b/tests/assembly/powerpc64-struct-abi.rs
@@ -1,4 +1,4 @@
-//@ revisions: elfv1-be elfv2-be elfv2-le
+//@ revisions: elfv1-be elfv2-be elfv2-le aix
 //@ assembly-output: emit-asm
 //@ compile-flags: -O
 //@[elfv1-be] compile-flags: --target powerpc64-unknown-linux-gnu
@@ -7,8 +7,13 @@
 //@[elfv2-be] needs-llvm-components: powerpc
 //@[elfv2-le] compile-flags: --target powerpc64le-unknown-linux-gnu
 //@[elfv2-le] needs-llvm-components: powerpc
+//@[aix] compile-flags: --target powerpc64-ibm-aix
+//@[aix] needs-llvm-components: powerpc
 //@[elfv1-be] filecheck-flags: --check-prefix be
 //@[elfv2-be] filecheck-flags: --check-prefix be
+//@[elfv1-be] filecheck-flags: --check-prefix elf
+//@[elfv2-be] filecheck-flags: --check-prefix elf
+//@[elfv2-le] filecheck-flags: --check-prefix elf
 
 #![feature(no_core, lang_items)]
 #![no_std]
@@ -44,6 +49,10 @@ struct FiveU16s(u16, u16, u16, u16, u16);
 struct ThreeU8s(u8, u8, u8);
 
 // CHECK-LABEL: read_large
+// aix: lwz [[REG1:.*]], 16(4)
+// aix-NEXT: lxvd2x 0, 0, 4
+// aix-NEXT: stw [[REG1]], 16(3)
+// aix-NEXT: stxvd2x 0, 0, 3
 // be: lwz [[REG1:.*]], 16(4)
 // be-NEXT: stw [[REG1]], 16(3)
 // be-NEXT: ld [[REG2:.*]], 8(4)
@@ -61,6 +70,10 @@ extern "C" fn read_large(x: &FiveU32s) -> FiveU32s {
 }
 
 // CHECK-LABEL: read_medium
+// aix: lhz [[REG1:.*]], 8(4)
+// aix-NEXT: ld [[REG2:.*]], 0(4)
+// aix-NEXT: sth [[REG1]], 8(3)
+// aix-NEXT: std [[REG2]], 0(3)
 // elfv1-be: lhz [[REG1:.*]], 8(4)
 // elfv1-be-NEXT: ld [[REG2:.*]], 0(4)
 // elfv1-be-NEXT: sth [[REG1]], 8(3)
@@ -78,6 +91,10 @@ extern "C" fn read_medium(x: &FiveU16s) -> FiveU16s {
 }
 
 // CHECK-LABEL: read_small
+// aix: lbz [[REG1:.*]], 2(4)
+// aix-NEXT: lhz [[REG2:.*]], 0(4)
+// aix-NEXT: stb [[REG1]], 2(3)
+// aix-NEXT: sth [[REG2]], 0(3)
 // elfv1-be: lbz [[REG1:.*]], 2(4)
 // elfv1-be-NEXT: lhz [[REG2:.*]], 0(4)
 // elfv1-be-NEXT: stb [[REG1]], 2(3)
@@ -95,9 +112,17 @@ extern "C" fn read_small(x: &ThreeU8s) -> ThreeU8s {
 }
 
 // CHECK-LABEL: write_large
-// CHECK: std 3, 0(6)
+// aix: std 3, 48(1)
+// aix-NEXT: rldicl [[REG1:.*]], 5, 32, 32
+// aix-NEXT: std 5, 64(1)
+// aix-NEXT: std 4, 56(1)
+// aix-NEXT: stw [[REG1]], 16(6)
+// aix-NEXT: addi [[REG2:.*]], 1, 48
+// aix-NEXT: lxvd2x 0, 0, [[REG2]]
+// aix-NEXT: stxvd2x 0, 0, 6
+// elf: std 3, 0(6)
 // be-NEXT: rldicl [[REG1:.*]], 5, 32, 32
-// CHECK-NEXT: std 4, 8(6)
+// elf-NEXT: std 4, 8(6)
 // be-NEXT: stw [[REG1]], 16(6)
 // elfv2-le-NEXT: stw 5, 16(6)
 // CHECK-NEXT: blr
@@ -107,7 +132,12 @@ extern "C" fn write_large(x: FiveU32s, dest: &mut FiveU32s) {
 }
 
 // CHECK-LABEL: write_medium
-// CHECK: std 3, 0(5)
+// aix: std 4, 56(1)
+// aix-NEXT: rldicl [[REG1:.*]], 4, 16, 48
+// aix-NEXT: std 3, 48(1)
+// aix-NEXT: std 3, 0(5)
+// aix-NEXT: sth [[REG1]], 8(5)
+// elf: std 3, 0(5)
 // be-NEXT: rldicl [[REG1:.*]], 4, 16, 48
 // be-NEXT: sth [[REG1]], 8(5)
 // elfv2-le-NEXT: sth 4, 8(5)
@@ -118,6 +148,11 @@ extern "C" fn write_medium(x: FiveU16s, dest: &mut FiveU16s) {
 }
 
 // CHECK-LABEL: write_small
+// aix: std 3, 48(1)
+// aix-NEXT: rldicl [[REG1:.*]], 3, 16, 48
+// aix-NEXT: sth 3, 0(4)
+// aix-NEXT: lbz 3, 50(1)
+// aix-NEXT: stb [[REG1]], 2(4)
 // be: stb 3, 2(4)
 // be-NEXT: srwi [[REG1:.*]], 3, 8
 // be-NEXT: sth [[REG1]], 0(4)