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authorbors <bors@rust-lang.org>2024-12-06 15:49:11 +0000
committerbors <bors@rust-lang.org>2024-12-06 15:49:11 +0000
commitcdeddae4f6f0934d9cc895fe1cacccba78ff1981 (patch)
treea280cd6ef6611415bf3812b644692a5e2889d4c5 /compiler/rustc_codegen_cranelift/src/codegen_i128.rs
parentbc145cec4565a97a1b08df52d26ddf48ce3d7d0a (diff)
parent063e21b4c497ee626c1a6770e82fa75070c1e8ab (diff)
downloadrust-cdeddae4f6f0934d9cc895fe1cacccba78ff1981.tar.gz
rust-cdeddae4f6f0934d9cc895fe1cacccba78ff1981.zip
Auto merge of #133956 - bjorn3:sync_cg_clif-2024-12-06, r=bjorn3
Sync cg clif 2024 12 06

The main highlights this time are a Cranelift update disabling the clif ir verifier by default for better performance.

r? `@ghost`

`@rustbot` label +A-codegen +A-cranelift +T-compiler
Diffstat (limited to 'compiler/rustc_codegen_cranelift/src/codegen_i128.rs')
-rw-r--r--compiler/rustc_codegen_cranelift/src/codegen_i128.rs27
1 files changed, 6 insertions, 21 deletions
diff --git a/compiler/rustc_codegen_cranelift/src/codegen_i128.rs b/compiler/rustc_codegen_cranelift/src/codegen_i128.rs
index b6a4769e031..734574338d0 100644
--- a/compiler/rustc_codegen_cranelift/src/codegen_i128.rs
+++ b/compiler/rustc_codegen_cranelift/src/codegen_i128.rs
@@ -81,26 +81,6 @@ pub(crate) fn maybe_codegen_checked<'tcx>(
     match bin_op {
         BinOp::BitAnd | BinOp::BitOr | BinOp::BitXor => unreachable!(),
         BinOp::Add | BinOp::Sub => None,
-        BinOp::Mul if is_signed => {
-            let out_ty = Ty::new_tup(fx.tcx, &[lhs.layout().ty, fx.tcx.types.bool]);
-            let oflow = CPlace::new_stack_slot(fx, fx.layout_of(fx.tcx.types.i32));
-            let lhs = lhs.load_scalar(fx);
-            let rhs = rhs.load_scalar(fx);
-            let oflow_ptr = oflow.to_ptr().get_addr(fx);
-            let res = fx.lib_call_unadjusted(
-                "__muloti4",
-                vec![
-                    AbiParam::new(types::I128),
-                    AbiParam::new(types::I128),
-                    AbiParam::new(fx.pointer_type),
-                ],
-                vec![AbiParam::new(types::I128)],
-                &[lhs, rhs, oflow_ptr],
-            )[0];
-            let oflow = oflow.to_cvalue(fx).load_scalar(fx);
-            let oflow = fx.bcx.ins().ireduce(types::I8, oflow);
-            Some(CValue::by_val_pair(res, oflow, fx.layout_of(out_ty)))
-        }
         BinOp::Mul => {
             let out_ty = Ty::new_tup(fx.tcx, &[lhs.layout().ty, fx.tcx.types.bool]);
             let out_place = CPlace::new_stack_slot(fx, fx.layout_of(out_ty));
@@ -110,7 +90,12 @@ pub(crate) fn maybe_codegen_checked<'tcx>(
                 AbiParam::new(types::I128),
             ];
             let args = [out_place.to_ptr().get_addr(fx), lhs.load_scalar(fx), rhs.load_scalar(fx)];
-            fx.lib_call("__rust_u128_mulo", param_types, vec![], &args);
+            fx.lib_call(
+                if is_signed { "__rust_i128_mulo" } else { "__rust_u128_mulo" },
+                param_types,
+                vec![],
+                &args,
+            );
             Some(out_place.to_cvalue(fx))
         }
         BinOp::AddUnchecked | BinOp::SubUnchecked | BinOp::MulUnchecked => unreachable!(),