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authorGuillaume Gomez <guillaume1.gomez@gmail.com>2025-06-29 12:29:53 +0200
committerGitHub <noreply@github.com>2025-06-29 12:29:53 +0200
commit66ad1f2abf648ba0644cd478dd49cde0f4bef558 (patch)
tree58ba7b22c77dbca08839f920313a2e28ef58175a /compiler/rustc_codegen_cranelift/src
parent5ca574e85b67cec0a6fc3fddfe398cbe676c9c69 (diff)
parent2ffa1dd392c1fe9c23a2f11f7b7a293a744c05ce (diff)
downloadrust-66ad1f2abf648ba0644cd478dd49cde0f4bef558.tar.gz
rust-66ad1f2abf648ba0644cd478dd49cde0f4bef558.zip
Rollup merge of #142078 - sayantn:more-intrinsics, r=workingjubilee
Add SIMD funnel shift and round-to-even intrinsics

This PR adds 3 new SIMD intrinsics

 - `simd_funnel_shl` - funnel shift left
 - `simd_funnel_shr` - funnel shift right
 - `simd_round_ties_even` (vector version of `round_ties_even_fN`)

TODO (future PR): implement `simd_fsh{l,r}` in miri, cg_gcc and cg_clif (it is surprisingly hard to implement without branches, the common tricks that rotate uses doesn't work because we have 2 elements now. e.g, the `-n&31` trick used by cg_gcc to implement rotate doesn't work with this because then `fshl(a, b, 0)` will be `a | b`)

[#t-compiler > More SIMD intrinsics](https://rust-lang.zulipchat.com/#narrow/channel/131828-t-compiler/topic/More.20SIMD.20intrinsics/with/522130286)

`@rustbot` label T-compiler T-libs A-intrinsics F-core_intrinsics
r? `@workingjubilee`
Diffstat (limited to 'compiler/rustc_codegen_cranelift/src')
-rw-r--r--compiler/rustc_codegen_cranelift/src/intrinsics/simd.rs5
1 files changed, 4 insertions, 1 deletions
diff --git a/compiler/rustc_codegen_cranelift/src/intrinsics/simd.rs b/compiler/rustc_codegen_cranelift/src/intrinsics/simd.rs
index 68ff0b622c8..6281089ee24 100644
--- a/compiler/rustc_codegen_cranelift/src/intrinsics/simd.rs
+++ b/compiler/rustc_codegen_cranelift/src/intrinsics/simd.rs
@@ -496,7 +496,8 @@ pub(super) fn codegen_simd_intrinsic_call<'tcx>(
         | sym::simd_flog
         | sym::simd_flog10
         | sym::simd_flog2
-        | sym::simd_round => {
+        | sym::simd_round
+        | sym::simd_round_ties_even => {
             intrinsic_args!(fx, args => (a); intrinsic);
 
             if !a.layout().ty.is_simd() {
@@ -527,6 +528,8 @@ pub(super) fn codegen_simd_intrinsic_call<'tcx>(
                     (sym::simd_flog2, types::F64) => "log2",
                     (sym::simd_round, types::F32) => "roundf",
                     (sym::simd_round, types::F64) => "round",
+                    (sym::simd_round_ties_even, types::F32) => "rintf",
+                    (sym::simd_round_ties_even, types::F64) => "rint",
                     _ => unreachable!("{:?}", intrinsic),
                 };
                 fx.lib_call(