diff options
| author | bors <bors@rust-lang.org> | 2024-07-25 18:05:00 +0000 |
|---|---|---|
| committer | bors <bors@rust-lang.org> | 2024-07-25 18:05:00 +0000 |
| commit | aa877bc71c8c8082122bee23d17c8669f30f275d (patch) | |
| tree | 1ab3cc23cee9f3240950faa293515c9536120f33 /compiler/rustc_codegen_cranelift/src | |
| parent | eb10639928a2781cf0a12440007fbcc1e3a6888f (diff) | |
| parent | cf1ce4becabf3f07b82c7dac4fd4aa3d544c3b21 (diff) | |
| download | rust-aa877bc71c8c8082122bee23d17c8669f30f275d.tar.gz rust-aa877bc71c8c8082122bee23d17c8669f30f275d.zip | |
Auto merge of #128195 - matthiaskrgr:rollup-195dfdf, r=matthiaskrgr
Rollup of 6 pull requests Successful merges: - #126908 (Use Cow<'static, str> for InlineAsmTemplatePiece::String) - #127999 (Inject arm32 shims into Windows metadata generation) - #128137 (CStr: derive PartialEq, Eq; add test for Ord) - #128185 (Fix a span error when parsing a wrong param of function.) - #128187 (Fix 1.80.0 version in RELEASES.md) - #128189 (Turn an unreachable code path into an ICE) r? `@ghost` `@rustbot` modify labels: rollup
Diffstat (limited to 'compiler/rustc_codegen_cranelift/src')
| -rw-r--r-- | compiler/rustc_codegen_cranelift/src/inline_asm.rs | 4 | ||||
| -rw-r--r-- | compiler/rustc_codegen_cranelift/src/intrinsics/llvm_x86.rs | 42 |
2 files changed, 23 insertions, 23 deletions
diff --git a/compiler/rustc_codegen_cranelift/src/inline_asm.rs b/compiler/rustc_codegen_cranelift/src/inline_asm.rs index c88230c9360..16edec47e10 100644 --- a/compiler/rustc_codegen_cranelift/src/inline_asm.rs +++ b/compiler/rustc_codegen_cranelift/src/inline_asm.rs @@ -46,9 +46,7 @@ pub(crate) fn codegen_inline_asm_terminator<'tcx>( // Used by panic_abort on Windows, but uses a syntax which only happens to work with // asm!() by accident and breaks with the GNU assembler as well as global_asm!() for // the LLVM backend. - if template.len() == 1 - && template[0] == InlineAsmTemplatePiece::String("int $$0x29".to_string()) - { + if template.len() == 1 && template[0] == InlineAsmTemplatePiece::String("int $$0x29".into()) { fx.bcx.ins().trap(TrapCode::User(1)); return; } diff --git a/compiler/rustc_codegen_cranelift/src/intrinsics/llvm_x86.rs b/compiler/rustc_codegen_cranelift/src/intrinsics/llvm_x86.rs index e1896138e48..a20faa2cad3 100644 --- a/compiler/rustc_codegen_cranelift/src/intrinsics/llvm_x86.rs +++ b/compiler/rustc_codegen_cranelift/src/intrinsics/llvm_x86.rs @@ -40,7 +40,7 @@ pub(crate) fn codegen_x86_llvm_intrinsic_call<'tcx>( shl rdx, 32 or rax, rdx " - .to_string(), + .into(), )], &[ CInlineAsmOperand::In { @@ -471,7 +471,7 @@ pub(crate) fn codegen_x86_llvm_intrinsic_call<'tcx>( // into 0x80000000 for which Cranelift doesn't have a native instruction. codegen_inline_asm_inner( fx, - &[InlineAsmTemplatePiece::String(format!("cvtps2dq xmm0, xmm0"))], + &[InlineAsmTemplatePiece::String("cvtps2dq xmm0, xmm0".into())], &[CInlineAsmOperand::InOut { reg: InlineAsmRegOrRegClass::Reg(InlineAsmReg::X86(X86InlineAsmReg::xmm0)), _late: true, @@ -875,7 +875,7 @@ pub(crate) fn codegen_x86_llvm_intrinsic_call<'tcx>( codegen_inline_asm_inner( fx, - &[InlineAsmTemplatePiece::String(asm.to_string())], + &[InlineAsmTemplatePiece::String(asm.into())], &[ CInlineAsmOperand::InOut { reg: InlineAsmRegOrRegClass::Reg(InlineAsmReg::X86(X86InlineAsmReg::ax)), @@ -914,7 +914,7 @@ pub(crate) fn codegen_x86_llvm_intrinsic_call<'tcx>( codegen_inline_asm_inner( fx, - &[InlineAsmTemplatePiece::String(format!("pcmpestri xmm0, xmm1, {imm8}"))], + &[InlineAsmTemplatePiece::String(format!("pcmpestri xmm0, xmm1, {imm8}").into())], &[ CInlineAsmOperand::In { reg: InlineAsmRegOrRegClass::Reg(InlineAsmReg::X86(X86InlineAsmReg::xmm0)), @@ -967,7 +967,7 @@ pub(crate) fn codegen_x86_llvm_intrinsic_call<'tcx>( codegen_inline_asm_inner( fx, - &[InlineAsmTemplatePiece::String(format!("pcmpestrm xmm0, xmm1, {imm8}"))], + &[InlineAsmTemplatePiece::String(format!("pcmpestrm xmm0, xmm1, {imm8}").into())], &[ CInlineAsmOperand::InOut { reg: InlineAsmRegOrRegClass::Reg(InlineAsmReg::X86(X86InlineAsmReg::xmm0)), @@ -1015,7 +1015,7 @@ pub(crate) fn codegen_x86_llvm_intrinsic_call<'tcx>( codegen_inline_asm_inner( fx, - &[InlineAsmTemplatePiece::String(format!("pclmulqdq xmm0, xmm1, {imm8}"))], + &[InlineAsmTemplatePiece::String(format!("pclmulqdq xmm0, xmm1, {imm8}").into())], &[ CInlineAsmOperand::InOut { reg: InlineAsmRegOrRegClass::Reg(InlineAsmReg::X86(X86InlineAsmReg::xmm0)), @@ -1052,7 +1052,9 @@ pub(crate) fn codegen_x86_llvm_intrinsic_call<'tcx>( codegen_inline_asm_inner( fx, - &[InlineAsmTemplatePiece::String(format!("aeskeygenassist xmm0, xmm0, {imm8}"))], + &[InlineAsmTemplatePiece::String( + format!("aeskeygenassist xmm0, xmm0, {imm8}").into(), + )], &[CInlineAsmOperand::InOut { reg: InlineAsmRegOrRegClass::Reg(InlineAsmReg::X86(X86InlineAsmReg::xmm0)), _late: true, @@ -1071,7 +1073,7 @@ pub(crate) fn codegen_x86_llvm_intrinsic_call<'tcx>( codegen_inline_asm_inner( fx, - &[InlineAsmTemplatePiece::String("aesimc xmm0, xmm0".to_string())], + &[InlineAsmTemplatePiece::String("aesimc xmm0, xmm0".into())], &[CInlineAsmOperand::InOut { reg: InlineAsmRegOrRegClass::Reg(InlineAsmReg::X86(X86InlineAsmReg::xmm0)), _late: true, @@ -1091,7 +1093,7 @@ pub(crate) fn codegen_x86_llvm_intrinsic_call<'tcx>( codegen_inline_asm_inner( fx, - &[InlineAsmTemplatePiece::String("aesenc xmm0, xmm1".to_string())], + &[InlineAsmTemplatePiece::String("aesenc xmm0, xmm1".into())], &[ CInlineAsmOperand::InOut { reg: InlineAsmRegOrRegClass::Reg(InlineAsmReg::X86(X86InlineAsmReg::xmm0)), @@ -1117,7 +1119,7 @@ pub(crate) fn codegen_x86_llvm_intrinsic_call<'tcx>( codegen_inline_asm_inner( fx, - &[InlineAsmTemplatePiece::String("aesenclast xmm0, xmm1".to_string())], + &[InlineAsmTemplatePiece::String("aesenclast xmm0, xmm1".into())], &[ CInlineAsmOperand::InOut { reg: InlineAsmRegOrRegClass::Reg(InlineAsmReg::X86(X86InlineAsmReg::xmm0)), @@ -1143,7 +1145,7 @@ pub(crate) fn codegen_x86_llvm_intrinsic_call<'tcx>( codegen_inline_asm_inner( fx, - &[InlineAsmTemplatePiece::String("aesdec xmm0, xmm1".to_string())], + &[InlineAsmTemplatePiece::String("aesdec xmm0, xmm1".into())], &[ CInlineAsmOperand::InOut { reg: InlineAsmRegOrRegClass::Reg(InlineAsmReg::X86(X86InlineAsmReg::xmm0)), @@ -1169,7 +1171,7 @@ pub(crate) fn codegen_x86_llvm_intrinsic_call<'tcx>( codegen_inline_asm_inner( fx, - &[InlineAsmTemplatePiece::String("aesdeclast xmm0, xmm1".to_string())], + &[InlineAsmTemplatePiece::String("aesdeclast xmm0, xmm1".into())], &[ CInlineAsmOperand::InOut { reg: InlineAsmRegOrRegClass::Reg(InlineAsmReg::X86(X86InlineAsmReg::xmm0)), @@ -1207,7 +1209,7 @@ pub(crate) fn codegen_x86_llvm_intrinsic_call<'tcx>( codegen_inline_asm_inner( fx, - &[InlineAsmTemplatePiece::String(format!("sha1rnds4 xmm1, xmm2, {func}"))], + &[InlineAsmTemplatePiece::String(format!("sha1rnds4 xmm1, xmm2, {func}").into())], &[ CInlineAsmOperand::InOut { reg: InlineAsmRegOrRegClass::Reg(InlineAsmReg::X86(X86InlineAsmReg::xmm1)), @@ -1233,7 +1235,7 @@ pub(crate) fn codegen_x86_llvm_intrinsic_call<'tcx>( codegen_inline_asm_inner( fx, - &[InlineAsmTemplatePiece::String("sha1msg1 xmm1, xmm2".to_string())], + &[InlineAsmTemplatePiece::String("sha1msg1 xmm1, xmm2".into())], &[ CInlineAsmOperand::InOut { reg: InlineAsmRegOrRegClass::Reg(InlineAsmReg::X86(X86InlineAsmReg::xmm1)), @@ -1259,7 +1261,7 @@ pub(crate) fn codegen_x86_llvm_intrinsic_call<'tcx>( codegen_inline_asm_inner( fx, - &[InlineAsmTemplatePiece::String("sha1msg2 xmm1, xmm2".to_string())], + &[InlineAsmTemplatePiece::String("sha1msg2 xmm1, xmm2".into())], &[ CInlineAsmOperand::InOut { reg: InlineAsmRegOrRegClass::Reg(InlineAsmReg::X86(X86InlineAsmReg::xmm1)), @@ -1285,7 +1287,7 @@ pub(crate) fn codegen_x86_llvm_intrinsic_call<'tcx>( codegen_inline_asm_inner( fx, - &[InlineAsmTemplatePiece::String("sha1nexte xmm1, xmm2".to_string())], + &[InlineAsmTemplatePiece::String("sha1nexte xmm1, xmm2".into())], &[ CInlineAsmOperand::InOut { reg: InlineAsmRegOrRegClass::Reg(InlineAsmReg::X86(X86InlineAsmReg::xmm1)), @@ -1312,7 +1314,7 @@ pub(crate) fn codegen_x86_llvm_intrinsic_call<'tcx>( codegen_inline_asm_inner( fx, - &[InlineAsmTemplatePiece::String("sha256rnds2 xmm1, xmm2".to_string())], + &[InlineAsmTemplatePiece::String("sha256rnds2 xmm1, xmm2".into())], &[ CInlineAsmOperand::InOut { reg: InlineAsmRegOrRegClass::Reg(InlineAsmReg::X86(X86InlineAsmReg::xmm1)), @@ -1343,7 +1345,7 @@ pub(crate) fn codegen_x86_llvm_intrinsic_call<'tcx>( codegen_inline_asm_inner( fx, - &[InlineAsmTemplatePiece::String("sha256msg1 xmm1, xmm2".to_string())], + &[InlineAsmTemplatePiece::String("sha256msg1 xmm1, xmm2".into())], &[ CInlineAsmOperand::InOut { reg: InlineAsmRegOrRegClass::Reg(InlineAsmReg::X86(X86InlineAsmReg::xmm1)), @@ -1369,7 +1371,7 @@ pub(crate) fn codegen_x86_llvm_intrinsic_call<'tcx>( codegen_inline_asm_inner( fx, - &[InlineAsmTemplatePiece::String("sha256msg2 xmm1, xmm2".to_string())], + &[InlineAsmTemplatePiece::String("sha256msg2 xmm1, xmm2".into())], &[ CInlineAsmOperand::InOut { reg: InlineAsmRegOrRegClass::Reg(InlineAsmReg::X86(X86InlineAsmReg::xmm1)), @@ -1435,7 +1437,7 @@ pub(crate) fn codegen_x86_llvm_intrinsic_call<'tcx>( let edx_place = res_place.place_field(fx, FieldIdx::new(1)); codegen_inline_asm_inner( fx, - &[InlineAsmTemplatePiece::String("rdtsc".to_string())], + &[InlineAsmTemplatePiece::String("rdtsc".into())], &[ CInlineAsmOperand::Out { reg: InlineAsmRegOrRegClass::Reg(InlineAsmReg::X86(X86InlineAsmReg::ax)), |
